%0 Journal Article
%T NOC AND BUS ARCHITECTURE: A COMPARISON
%A RAJEEV KAMAL
%A NEERAJ YADAV
%J International Journal of Engineering Science and Technology
%D 2012
%I Engg Journals Publication
%X Network-on-chip designs promise to offer considerable advantages over the traditional bus-based architecture. As continuing scaling of Moore¡¯s law enables ever greater transistor densities, design complexity, power limitations and application convergence networks have started to replace busses in much smaller systems and the enhancement of NoC. This paper summarizes the advantages of the NoC and the limitations of traditional bus based architecture. In this paper we discuss a detailed comparison of area, power, scalability andperformance of traditional busses in comparison with NoC.
%K Networks on Chips
%K Systems on Chips.
%U http://www.ijest.info/docs/IJEST12-04-04-040.pdf