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Search Results: 1 - 10 of 326058 matches for " S. Geetha Priya "
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A Novel Approach of Energy Optimization in WSN
S. Geetha Priya,A.R. Arunachalam
International Journal of Computer Science and Mobile Computing , 2013,
Abstract: The wireless link can be unreliable in realistic wireless sensor networks (WSNs). Energy efficientand reliable data forwarding is important because each node has limited resources. Therefore, we mustsuggest an optimal solution that considers using the information of the node’s characteristic A wirelesssensor network is composed of a large number of low-cost devices distributed over a geographic area. Sensornodes have limited processing capabilities therefore simplified protocol architecture should be designed so asto make communications simple and efficient. Moreover, the power supply unit is based on an energy-limitedbattery the networks should be aimed at minimizing the energy consumption. A forwarding scheme for WSNaimed at combining low computational complexity and high performance in terms of energy efficiency andreliability. The approach relies on a packet-splitting algorithm based on the BURST algorithm. Theperformance of burst is to be obtained by Shortest Path with Load Balancing (SP).The energy efficiency islow in this splitting process compare to those shortest paths. To estimation of the mean energy reductionfactor achievable with the forwarding scheme should be derived and the reassembling is done in destinationside, the values to be coded in code block and simulated using MATLAB simulator. The proposed algorithmoutperforms in terms of energy saving and increases the network lifetime.
A New Leakage Power Reduction Technique for CMOS VLSI Circuits
M. Geetha Priya,K. Baskaran,D. Krishnaveni,S. Srinivasan
Journal of Artificial Intelligence , 2012,
Abstract: A robust method which is equally effectual for static power control in CMOS VLSI circuits for System on Chip (Soc) applications in deep submicron technologies is proposed. Referring to the International Technology Roadmap for Semiconductors (ITRS), the total power dissipation may be significantly contributed by leakage power dissipation. To reduce leakage the proposed method introduces two self controlled stacked leakage control transistors (LT) between Vdd and ground, which offers high resistance, when it is in off state. The gate and substrate of each LT’s are tied together to introduce Dynamic Threshold voltage MOSFET (DTMOS). This proposed method is intuitively momentous and leads to better performance measure in terms of dynamic power, leakage power propagation delay and Power Delay Product (PDP) with standard threshold devices. The experiment and simulation results show that the proposed method effectively outperforms than the base case with little area overhead.
Frequency Synchronization in OFDM System  [PDF]
C. Geetha Priya, A. M. Vasumathi
Journal of Signal and Information Processing (JSIP) , 2013, DOI: 10.4236/jsip.2013.43B024
Abstract:

An accurate frequency synchronization method using the zadoff-chu (ZC) constant envelop preamble is analyzed, and a new preamble weighted by pseudo-noise sequence is used for orthogonal frequency division multiplexing (OFDM) systems. Using this method, frequency offset estimator range is greatly enlarged with no loss in accuracy. The range of the frequency estimation is ±30 of subcarrier spacing using ZC sequence as preamble. Simulations in the MATLAB for an AWGN channel show that the proposed method achieves superior performance to existing techniques in terms of frequency accuracy and range.

Design and Optimization of Log Periodic Toothed Antenna for UWB Applications
L. Franklin T elfer,T. R. Geetha Ramani,P. Catherine Beaula,M. S. Divya Priya
International Journal of Engineering Innovations and Research , 2013,
Abstract: The aim of this paper is to design and optimize the performance of log periodic toothed antenna for Ultra Wideband (UWB) Applications. The operating frequency of the antenna is 4-10GHz. The proposed method focuses to optimize the performance of the antenna by achieving the gain of 4.5dB, VSWR This antenna is simulated using ANSOFT-HFSS and the results are presented.
Single Phase Induction Motor Drive with Restrained Speed and Torque Ripples Using Neural Network Predictive Controller  [PDF]
S. Saravanan, K. Geetha
Circuits and Systems (CS) , 2016, DOI: 10.4236/cs.2016.711309
Abstract: In industrial drives, electric motors are extensively utilized to impart motion control and induction motors are the most familiar drive at present due to its extensive performance characteristic similar with that of DC drives. Precise control of drives is the main attribute in industries to optimize the performance and to increase its production rate. In motion control, the major considerations are the torque and speed ripples. Design of controllers has become increasingly complex to such systems for better management of energy and raw materials to attain optimal performance. Meager parameter appraisal results are unsuitable, leading to unstable operation. The rapid intensification of digital computer revolutionizes to practice precise control and allows implementation of advanced control strategy to extremely multifaceted systems. To solve complex control problems, model predictive control is an authoritative scheme, which exploits an explicit model of the process to be controlled. This paper presents a predictive control strategy by a neural network predictive controller based single phase induction motor drive to minimize the speed and torque ripples. The proposed method exhibits better performance than the conventional controller and validity of the proposed method is verified by the simulation results using MATLAB software.
A NOVEL DESIGN OF REVERSIBLE SERIAL AND PARALLEL ADDER/SUBTRACTOR
KRISHNAVENI.D,,GEETHA PRIYA.M
International Journal of Engineering Science and Technology , 2011,
Abstract: Under ideal conditions, Reversible logic gates produce zero power dissipation. So these can be used for low power VLSI design. This paper proposes a new reversible parallel adder/subtractor using 4*4 Reversible DKG gate that can work singly as a reversible full adder and a full subtractor. A serial adder/subtractor is also designed in this paper using Reversible Universal Shift registers and DKG gate.This paper provides a threshold to build more complex arithmetic systems using reversible logic.
Power Management During Scan Based Sequential Circuit Testing
Reshma.P,M.Geetha Priya
Advanced Computing : an International Journal , 2011,
Abstract: This paper shows that not every scan cell contributes equally to the power consumption during scanbased test. The transitions at some scan cells cause more toggles at the internal signal lines of a circuitthan the transitions at other scan cells. Hence the transitions at these scan cells have a larger impact onthe power consumption during test application. These scan cells are called power sensitive scan cells.Averilog based approach is proposed to identify a set of power sensitive scan cells. Additional hardware isadded to freeze the outputs of power sensitive scan cells during scan shifting in order to reduce the shiftpower consumption.when multiple scan chain is incorporated along with freezing the power sensitivescan cell,over all power during testing can be reduced to a larger extend.
Possible Challenges of Developing Migration Projects
S. Geetha
International Journal of Computers & Technology , 2012,
Abstract: Organisations often face the challenges of migrating from legacy systems to new target systems. Open Source Software (OSS) is being suggested as a solution to a lot of computing problems. This paper presents an overview of Open Source Software migration and suggests criteria for assessing migration challenges. The Challenges are legacy system inflexibility, lack of scalability, lack of wider data access, shortage of skills, high cost of maintenance and unreliability. Couple this with continually changing technologies, and organizations are faced with the need to assess these new technologies and applications to power those technologies. The main objective of this paper is for software engineers, IT executives and others who are considering migration as a solution to their business challenges
An Artificial Intelligence Based Glucometer for Diabetic Patients using Urinal Analysis
S. Geetha
Bonfring International Journal of Power Systems and Integrated Circuits , 2013,
Abstract: There are nearly about 50.8 million people in the world who have diabetes and maintaining the blood sugar level of diabetic patients is very important. The diabetic patient regularly monitor their glucose level by pricking the finger for taking blood samples 4-5 times a day and controls their sugar level by taking appropriate dosage of medicine. An artificial intelligence based image processing application has been developed, which non-invasively measures the glucose concentration present in the urine sample of a person and hence the equivalent blood glucose level of that person is inferred. Blood sugar level of a person from his/her urine sample has been monitored by noting the colour change of the test sample, when it is reacted with Benedict?s reagent. The colour change of the sample is identified with the help of the camera and displays the result in the form of hue (predominant colour) value. This measurement has become possible by training the neural network using the hue value as the input vector and the glucose value as the test vector. A linear relationship has been obtained successfully with an accuracy of about 96.93%.
Lifetime Enhancement of Cluster Based Wireless Sensor Network through Energy Efficient MAC Protocol  [PDF]
B. Priya, S. Solai Manohar
Circuits and Systems (CS) , 2016, DOI: 10.4236/cs.2016.79200
Abstract: The efficient use of energy is an important performance metric to extend the lifetime of wireless sensor networks. Since major energy consumption of node is due to its transceiver, the design of MAC protocol plays a vital role in sensor network design. In cluster based sensor networks, due to the different functions of member node and cluster head node, the usage of common MAC protocol results increased energy consumption. To overcome this problem, a novel energy efficient hybrid MAC protocol (EEHMAC) for cluster based wireless sensor networks is proposed in this paper. The proposed EEHMAC protocol uses E-TDMA (Energy efficient TDMA) for intra-cluster communication and FDMA (Frequency Division Multiple Access) for inter-cluster communication. IDS (Iterative Deepening Search) based Scheduling algorithm is used for assigning time slot and frequency slot to nodes. Nodes in EEHMAC follow the periodic duty cycle, which reduces the idle listening, and overhearing problems. Simulation results reveal that an average of 18% energy saving is achieved compared to LEACH (Low Energy Adaptive Clustered Hierarchy) protocol and 10% energy is saved in comparison with GH-MAC (Graph theory based Hybrid MAC) protocol. It is evident that delay of EEHMAC is reduced by 17% and throughput is increased by 15% under all traffic conditions. These results demonstrate that EEHMAC performs better than existing MAC protocols in terms of energy efficiency, delay and throughput.
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