Despite extensive research efforts, a preventive human immunodeficiency virus (HIV) vaccine remains one of the major challenges in the field of AIDS research. Experimental strategies which have been proven successful for other viral vaccines are not enough to tackle HIV-1 and new approaches to design effective preventive AIDS vaccines are of utmost importance. Due to enormous diversity among global circulating HIV strains, an effective HIV vaccine must elicit broadly protective antibodies based responses; therefore discovering new broadly neutralizing antibodies (bNAbs) against HIV has become major focus in HIV vaccine research. However further understanding of the viral targets of such antibodies and mechanisms of action of bNAbs is required for advancement of HIV vaccine research. This technical note discusses our current knowledge on the bNAbs and immunoprophylaxis using viral vectors with their relevance in designing of new candidates to HIV-1 vaccines.
The advancement in CMOS technology has surpassed the progress in computer aided design tools, creating an avenue for new design optimization flows. This paper presents a design level transistor sizing based timing optimization algorithms for mixed-static-dynamic CMOS logic designs. This optimization algorithm performs timing optimization through partitioning a design into static and dynamic circuits based on timing critical paths, and is further extended through a process variation aware circuit level timing optimization algorithm for dynamic CMOS circuits. Implemented on a 64-b adder and ISCAS benchmark circuits for mixed-static-dynamic CMOS, the design level optimization algorithm demonstrated a critical path delay improvement of over 52% in comparison with static CMOS implementation by state-of-the-art commercial optimization tools.