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Search Results: 1 - 10 of 502 matches for " Kittur Harish Maillikarju "
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High Performance and Fault Tolerance Double Precision Floating Point Arithmetic Units
N. Vinothkumar,M.S. Ravi,Kittur Harish Maillikarju
Journal of Artificial Intelligence , 2013,
Abstract: The floating point arithmetic units are complex in their algorithms and many scientific problems require floating point units with high accuracy. Hence for increased performance and fault tolerance operations the double precision floating point arithmetic units adder, subtractor, multiplier and divider is designed which is enough for most System on Chip (SoC) applications and it also improves the accuracy during long chain of computations. The synthesized code results are verified and the complete layout is generated using backend flow.
Faster and Energy-Efficient Signed Multipliers
B. Ramkumar,Harish M. Kittur
VLSI Design , 2013, DOI: 10.1155/2013/495354
Abstract: We demonstrate faster and energy-efficient column compression multiplication with very small area overheads by using a combination of two techniques: partition of the partial products into two parts for independent parallel column compression and acceleration of the final addition using new hybrid adder structures proposed here. Based on the proposed techniques, 8-b, 16-b, 32-b, and 64-b Wallace (W), Dadda (D), and HPM (H) reduction tree based Baugh-Wooley multipliers are developed and compared with the regular W, D, H based Baugh-Wooley multipliers. The performances of the proposed multipliers are analyzed by evaluating the delay, area, and power, with 65?nm process technologies on interconnect and layout using industry standard design and layout tools. The result analysis shows that the 64-bit proposed multipliers are as much as 29%, 27%, and 21% faster than the regular W, D, H based Baugh-Wooley multipliers, respectively, with a maximum of only 2.4% power overhead. Also, the power-delay products (energy consumption) of the proposed 16-b, 32-b, and 64-b multipliers are significantly lower than those of the regular Baugh-Wooley multiplier. Applicability of the proposed techniques to the Booth-Encoded multipliers is also discussed. 1. Introduction High-speed multiplication is a primary requirement of high-performance digital systems. In recent trends, the column compression multipliers are popular for high-speed computations due to their higher speeds [1, 2]. The first column compression multiplier was introduced by Wallace in 1964 [3]. He reduced the partial product of rows by grouping into sets of three-row set and two-row set using (3,2) counter and (2,2)??counter, respectively. In 1965, Dadda altered the approach of Wallace by starting with the exact placement of the (3,2) counter and (2,2) counter in the maximum critical path delay of the multiplier [4]. Three-dimensional minimization- (TDM-) based column compression approach was proposed in 1996 to perform fast multiplication [5]. Since the 2000s, a closer reconsideration of Wallace and Dadda multipliers has been done and proved that the Dadda multiplier is slightly faster than the Wallace multiplier and the hardware required for Dadda multiplier is lesser than the Wallace multiplier [6, 7]. The HPM-based column compression was developed in 2006, and it has standard layout structure than Eriksson et al.’s multiplier [8]. The detailed case for HPM-based Baugh-Wooley multiplier against the Booth-Encoded multipliers has been described in [9]. In this work, we implement the proposed techniques with
Optimal Final Carry Propagate Adder Design for Parallel Multipliers
Ramkumar B.,Harish M. Kittur
Computer Science , 2011,
Abstract: Based on the ASIC layout level simulation of 7 types of adder structures each of four different sizes, i.e. a total of 28 adders, we propose expressions for the width of each of the three regions of the final Carry Propagate Adder (CPA) to be used in parallel multipliers. We also propose the types of adders to be used in each region that would lead to the optimal performance of the hybrid final adders in parallel multipliers. This work evaluates the complete performance of the analyzed designs in terms of delay, area, power through custom design and layout in 0.18 um CMOS process technology.
Faster and Low Power Twin Precision Multiplier
V. Sreedeep,B. Ramkumar,Harish M Kittur
Computer Science , 2011,
Abstract: In this work faster unsigned multiplication has been achieved by using a combination of High Performance Multiplication [HPM] column reduction technique and implementing a N-bit multiplier using 4 N/2-bit multipliers (recursive multiplication) and acceleration of the final addition using a hybrid adder. Low power has been achieved by using clock gating technique. Based on the proposed technique 16 and 32-bit multipliers are developed. The performance of the proposed multiplier is analyzed by evaluating the delay, area and power, with TCBNPHP 90 nm process technology on interconnect and layout using Cadence NC launch, RTL compiler and ENCOUNTER tools. The results show that the 32-bit proposed multiplier is as much as 22% faster, occupies only 3% more area and consumes 30% lesser power with respect to the recently reported twin precision multiplier.
Faster Energy Efficient Dadda Based Baugh-Wooley Multipliers
B. Ramkumar,V. Sreedeep,Harish M Kittur
Computer Science , 2011,
Abstract: In this work faster Baugh-Wooley multiplication has been achieved by using a combination of two design techniques: partition of the partial products into two parts for independent parallel column compression and acceleration of the final addition using a hybrid adder proposed in this work. Based on the proposed techniques 8, 16, 32 and 64-bit Dadda based Baugh-Wooley multipliers has been developed and compared with the regular Baugh-Wooley multiplier. The performance of the proposed multiplier is analyzed by evaluating the delay, area and power, with 180 nm process technologies on interconnect and layout using industry standard design and layout tools. The result analysis shows that the 64-bit proposed multiplier is as much as 26.9% faster than the regular Baugh-Wooley multiplier and requires only 2.21% more power. Also the power-delay product of the proposed design is significantly lower than that of the regular Baugh-Wooley multiplier.
Selective Match-Line Energizer Content Addressable Memory(SMLE -CAM)
Mohammed Zackriya. V,Harish M Kittur
Computer Science , 2014,
Abstract: A Content Addressable Memory (CAM) is a memory primarily designed for high speed search operation. Parallel search scheme forms the basis of CAM, thus power reduction is the challenge associated with a large amount of parallel active circuits. We are presenting a novel algorithm and architecture described as Selective Match-Line Energizer Content Addressable Memory (SMLE-CAM) which energizes only those MLs (Match-Line) whose first three bits are conditionally matched with corresponding first three search bit using special architecture which comprises of novel XNOR-CAM cell and novel XOR-CAM cell. The rest of the CAM chain is followed by NOR-CAM cell. The 256 X 144 bit SMLE-CAM is implemented in TSMC 90 nm technology and its robustness across PVT variation is verified. The post-layout simulation result shows, it has energy metric of 0.115 fJ/bit/search with search time 361.6 ps, the best reported so far. The maximum operating frequency is 1GHz.
Anterior saggital anorectoplasty and peri-vaginal musculature
Kittur Dinesh
Journal of Indian Association of Pediatric Surgeons , 2009,
District Wise Allocation Of Funds To The Hyderabad Karnataka Region Under The National Rural Health Mission
Shilpa Bhimrao Gaonkar,Anand Kittur
Golden Research Thoughts , 2012, DOI: 10.9780/22315063
Abstract: The National Rural Health Mission has been a Whistle Blower Policy started by the Government of India in April 2005 to encourage vigilant community participation in the direction of providing accessible, affordable, acceptable and accountable, effective and quality healthcare services, especially to the rural and vulnerable groups throughout the State with special focus on the backward districts with weak human development and health indicators. The launch of the mission aimed at addressing the issue of small and declining health sector financing by the Central and State governments in India. The State of Karnataka has constituted specific strategies and actions for achieving the goals set under the NRHM in its State Health Action Plan.
Enhancing contraceptive usage by post-placental intrauterine contraceptive devices (PPIUCD) insertion with evaluation of safety, efficacy, and expulsion
Sahaja Kittur,Y. M. Kabadi
International Journal of Reproduction, Contraception, Obstetrics and Gynecology , 2012, DOI: 10.5455/2320-1770.ijrcog001112
Abstract: Background: More than 100 million women in developing countries would prefer to avoid a pregnancy; but they may not be using any form of contraception. The study was conducted to assess the safety, incidence of perforation /pain/bleeding/foul discharge and expulsion rates at 6 week follow-up and willingness to continue when Cu T 380 A inserted within ten minutes of placental expulsion both in vaginal and C-section deliveries. Methods: This was an open label, prospective, and longitudinal study. The study was approved by the ethics committee of FOGSI. Results: The insertion of Intrauterine Contraceptive Devices (IUCD) at KIMS, Hubli was easy in 99.52% of subjects after normal delivery and 100% in all subjects after assisted vaginal deliveries. The position of the CuT was in situ in 94.78% of subjects, ultra sonogram was used in 24.76 % to confirm location where threads were not visible in the vagina and in 6.19% of subjects the tip of IUCD was in the cervix which was pushed back into the uterus using artery forceps. It was expelled in 5.23% of patients. There was no case of perforation in this series and no other major complications. Conclusions: Inserting CuT 380 A at 10 minutes after placental delivery is safe leading to the expanding of the usage of IUCD meeting the unmet needs. The expulsion rates would be minimal if it was inserted by a trained provider and placed at the fundus. [Int J Reprod Contracept Obstet Gynecol 2012; 1(1.000): 26-32]
Ginger extract inhibits LPS induced macrophage activation and function
Sudipta Tripathi, David Bruch, Dilip S Kittur
BMC Complementary and Alternative Medicine , 2008, DOI: 10.1186/1472-6882-8-1
Abstract: Murine peritoneal macrophages were stimulated by LPS in presence or absence of ginger extract and production of proinflammatory cytokines and chemokines were observed. We also studied the effect of ginger extract on the LPS induced expression of MHC II, B7.1, B7.2 and CD40 molecules. We also studied the antigen presenting function of ginger extract treated macrophages by primary mixed lymphocyte reaction.We observed that ginger extract inhibited IL-12, TNF-α, IL-1β (pro inflammatory cytokines) and RANTES, MCP-1 (pro inflammatory chemokines) production in LPS stimulated macrophages. Ginger extract also down regulated the expression of B7.1, B7.2 and MHC class II molecules. In addition ginger extract negatively affected the antigen presenting function of macrophages and we observed a significant reduction in T cell proliferation in response to allostimulation, when ginger extract treated macrophages were used as APCs. A significant decrease in IFN-γ and IL-2 production by T cells in response to allostimulation was also observed.In conclusion ginger extract inhibits macrophage activation and APC function and indirectly inhibits T cell activation.Macrophages are a major cell population of the innate immune system. They play an important role in mounting an inflammatory response, both in absence and presence of antigen, by secreting a number of cytokines and chemokines. These cytokines and chemokines influence the maturation and differentiation of the neighbouring cells of both the innate and adaptive immune system, which further enhances the inflammation. Other than being the first line of defence, macrophages also act as important accessory cells in the adaptive immune response.Macrophages play a role in the activation of the adaptive immune system by behaving as antigen presenting cells (APCs), the most important outcome of macrophage activation and maturation. Activated macrophages express MHC class II molecules and costimulatory molecules like CD80, CD86 and CD40 an
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