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Search Results: 1 - 10 of 467603 matches for " Khan A. Wahid "
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Automated Diabetic Retinopathy Detection Using Bag of Words Approach  [PDF]
Monzurul Islam, Anh V. Dinh, Khan A. Wahid
Journal of Biomedical Science and Engineering (JBiSE) , 2017, DOI: 10.4236/jbise.2017.105B010
Abstract:
Imaging and computer vision systems offer the ability to study quantitatively on human physiology. On contrary, manual interpretation requires tremendous amount of work, expertise and excessive processing time. This work presents an algorithm that integrates image processing and machine learning to diagnose diabetic retinopathy from retinal fundus images. This automated method classifies diabetic retinopathy (or absence thereof) based on a dataset collected from some publicly available database such as DRIDB0, DRIDB1, MESSIDOR, STARE and HRF. Our approach utilizes bag of words model with Speeded Up Robust Features and demonstrate classification over 180 fundus images containing lesions (hard exudates, soft exudates, microaneurysms, and haemorrhages) and non-lesions with an accuracy of 94.4%, precision of 94%, recall and f1-score of 94% and AUC of 95%. Thus, the proposed approach presents a path toward precise and automated diabetic retinopathy diagnosis on a massive scale.
Low Cost Design of a Hybrid Architecture of Integer Inverse DCT for H.264, VC-1, AVS, and HEVC
Muhammad Martuza,Khan A. Wahid
VLSI Design , 2012, DOI: 10.1155/2012/242989
Abstract: The paper presents a unified hybrid architecture to compute the integer inverse discrete cosine transform (IDCT) of multiple modern video codecs—AVS, H.264/AVC, VC-1, and HEVC (under development). Based on the symmetric structure of the matrices and the similarity in matrix operation, we develop a generalized “decompose and share” algorithm to compute the IDCT. The algorithm is later applied to four video standards. The hardware-share approach ensures the maximum circuit reuse during the computation. The architecture is designed with only adders and shifters to reduce the hardware cost significantly. The design is implemented on FPGA and later synthesized in CMOS 0.18?um technology. The results meet the requirements of advanced video coding applications. 1. Introduction In recent years, different video applications use different video standards, such as H.264/AVC [1], VC-1 [2], and AVS [3]. To improve the coding efficiency further, recently a joint collaboration team on video coding (JCT-VC) is drafting a next generation video coding standards, known tentatively as high efficient video coding (HEVC or H.265) [4]. The target bit rate is half of that of H.264/AVC. Besides, several other effective techniques are proposed in the draft to reduce the complexity of the encoder such as improved intrapicture coding, and simpler VLC coefficients [5]. As a result of these new features, experts predict that the HEVC will dominate the future multimedia market. In order to meet up the present and future demands of different multimedia applications, it becomes necessary to develop a unified video decoder that can support all popular video standards on a single platform. In recent years, there is a growing interest to develop multistandard inverse transform architectures for advanced multimedia applications. However, most of them do not support AVS, the video codec developed by Chinese government that became the core technology of China Mobile Multimedia Broadcasting (CMMB) [6]. None of the existing works supports the HEVC; thought it is not finalized yet, considering the future prospective of the HEVC [7], it is important to start exploring possible implementation in hardware of the transform unit discussed in the draft. In this paper, we present a new generalized algorithm and its hardwire implementation of an 8 × 8 IDCT architecture. The scheme is based on matrix decomposition with sparse matrices and offset computations. These sparse matrices are derived in a way that can be reused maximum number of times during decoding different inverse matrices. All multipliers
Lossless and Low-Power Image Compressor for Wireless Capsule Endoscopy
Tareq Hasan Khan,Khan A. Wahid
VLSI Design , 2011, DOI: 10.1155/2011/343787
Abstract: We present a lossless and low-complexity image compression algorithm for endoscopic images. The algorithm consists of a static prediction scheme and a combination of golomb-rice and unary encoding. It does not require any buffer memory and is suitable to work with any commercial low-power image sensors that output image pixels in raster-scan fashion. The proposed lossless algorithm has compression ratio of approximately 73% for endoscopic images. Compared to the existing lossless compression standard such as JPEG-LS, the proposed scheme has better compression ratio, lower computational complexity, and lesser memory requirement. The algorithm is implemented in a 0.18?μm CMOS technology and consumes 0.16?mm × 0.16?mm silicon area and 18?μW of power when working at 2 frames per second. 1. Introduction Wireless capsule endoscopy (WCE) [1–4] is a state-of-the-art technology to receive images of human intestine for medical diagnostics. In this technique, the patient ingests a specially designed electronic capsule which has imaging and wireless circuitry embedded inside (as shown in Figure 1). While the capsule travels through the gastrointestinal (GI) tract, it captures images and sends them wirelessly to an outside workstation (i.e., PC), where the images are reconstructed and displayed on a monitor for medical diagnostics. The development of wireless capsule endoscopy has changed video endoscopy of the little intestine into a much invasive and more complete examination. The increasing use of these resources and the comfort and ease with which some of these examinations can be performed makes it likely that wireless capsule video imaging will have a substantial impact on the management of small intestinal disease as well as other parts of the body. The capsule runs on button batteries that need to supply power for about 8–10 hours [1]. In this paper, our focus is on the image compressor in the capsule. Here, we propose an image compression algorithm by exploring the unique properties of endoscopic images. The scheme consists of a simple and static prediction scheme and encoding the error both in golomb-rice [5, 6] and in unary coding. The algorithm is particularly suitable to work with any commercial low-power image sensors [7, 8] that output image pixels in raster scan fashion, eliminating the need of large buffer memory to store the complete image frame. The proposed algorithm has low computational complexity and it is simple to implement. Figure 1: Block diagram of an endoscopic capsule. There have been some works reported on the image compressor of the
A DVP-Based Bridge Architecture to Randomly Access Pixels of High-Speed Image Sensors
Tareq Hasan Khan,Khan A. Wahid
EURASIP Journal on Embedded Systems , 2011, DOI: 10.1155/2011/270908
Abstract:
Upper limb musculoskeletal abnormalities in type 2 diabetic patients in low socioeconomic strata in Pakistan
Saera Suhail Kidwai, Lubna Wahid, Shaista A Siddiqi, Rashid M khan, Ishaq Ghauri, Ishaque Sheikh
BMC Research Notes , 2013, DOI: 10.1186/1756-0500-6-16
Abstract: This was an observational study in which type 2 diabetes patients attending our diabetic clinic were enrolled along with age and gender matched controls. Data was analyzed on SPSS 16.In total, 210 Type 2 diabetics (male 34.3%, female 65.7%) and 203 controls (male 35%, female 65%) were recruited. The mean age was 50.7± 10.2 years in diabetic group as compared to 49.5±10.6 years in the control group. The frequencies of hand region abnormalities were significantly higher in the diabetic subjects as compared to the controls (20.4%, p-value <0.001). Limited joint mobility (9.5% vs 2.5%), carpal tunnel syndrome (9% vs 2%), trigger finger (3.8% vs 0.5%), and dupuytren’s contracture (1% vs 0%) were found more frequent as compared to controls (all p-values <0.05). In the shoulder region of diabetic subjects, adhesive capsulitis and tendonitis was found in 10.9% and 9.5% respectively as compared to 2.5% and 2% in control group [p- value <0.001]. A weak but positive relationship was observed between age and duration of diabetes with these upper limb abnormalities. However, no correlation was found between the frequencies of these abnormalities with control of diabetes.A higher frequency of upper limb musculoskeletal abnormalities was observed in Type 2 diabetic patients as compared to control group.Diabetes mellitus (DM) is considered as an epidemic in the modern world and much of its morbidity and mortality is related to micro and macro vascular complications. However, it is also associated with musculoskeletal disorders of the hand and shoulder that can be very incapacitating and significantly compromise their quality of life [1,2].The manifestations of DM in the hand have been widely discussed in the last two decades, but the exact prevalence is still unknown. There is evidence that these entities are not only more frequent in patients with DM but may also be associated with its duration, poor metabolic control and presence of micro vascular complications [2-5]. Currently,
A DVP-Based Bridge Architecture to Randomly Access Pixels of High-Speed Image Sensors
Khan TareqHasan,Wahid KhanA
EURASIP Journal on Embedded Systems , 2011,
Abstract: A design of a novel bridge is proposed to interface digital-video-port (DVP) compatible image sensors with popular microcontrollers. Most commercially available CMOS image sensors send image data at high speed and in a row-by-row fashion. On the other hand, commercial microcontrollers run at relatively slower speed, and many embedded system applications need random access of pixel values. Moreover, commercial microcontrollers may not have sufficient internal memory to store a complete image of high resolution. The proposed bridge addresses these problems and provides an easy-to-use and compact way to interface image sensors with microcontrollers. The proposed design is verified in FPGA and later implemented using CMOS 0.18 um Artisan library cells. The design costs 4,735 gates and 0.12 mm2 silicon area. The synthesis results show that the bridge can support a data rate up to 254 megasamples/sec. Its applications may include pattern recognition, robotic vision, tracking system, and medical imaging.
Effect of Arbuscular Mycorrhiza Fungal Inoculation with Compost on Yield and Phosphorous Uptake of Berseem in Alkaline Calcareous Soil  [PDF]
Bismillah Jan, Amjad Ali, Fazli Wahid, Syed Noor Muhammad Shah, Asif Khan, Farmanullah Khan
American Journal of Plant Sciences (AJPS) , 2014, DOI: 10.4236/ajps.2014.59150
Abstract:

An experiment was conducted in pots under natural conditions in alkaline calcareous soil to determine berseem (Trifolium alexandrium) yield and P uptake as affected by Arbuscular mycorrhizal fungi (AMF) inoculation with compost prepared from fresh animal dung and rock phosphate. Data indicated that berseem shoot and roots yields increased significantly (P ≤ 0.05) by inoculation of indigenous mycorrhiza (AMF-I) and half dose of compost. Shoot yield increased as 98% and 76% roots yield as 60% and 52% over control and N and K fertilizers. Maximum and significantly (P ≤ 0.05) increased plant N and P uptake by berseem was observed in the treatment inoculated by commercial mycorrhiza (AMF-II) with full dose of compost followed by the inoculation of AMF-II with half dose of compost. Plants uptake of Cu, Mn and Fe was improved significantly (P ≤ 0.05) by the inoculation of AMF-II with half dose of compost, while Zn uptake was increased in the treatment of AMF-II inoculation with full dose of compost. Maximum and significantly (P ≤ 0.05) increased soil spores density of AMF as 27 spores per 20 g soil was noted by inoculation of AMF-I with half dose of compost, while maximum roots infection intensity in berseem was observed by the inoculation of AMF-I with full dose of compost. Results suggest that inoculation of AMF with compost has potential to improve berseem yields and plants nutrients uptake under given soil conditions.

On Matching Polynomials of a Simple Hexagonal Lattice
S. A. Wahid
Asian Journal of Information Technology , 2012,
Abstract: A recurrence relation is derived for the matching polynomial of a 2 x n hexagonal lattice.Explicit formulae are then obtained for the first ten and the final four coefficients.
Division-Free Multiquantization Scheme for Modern Video Codecs
Mousumi Das,Atahar Mostafa,Khan Wahid
Advances in Multimedia , 2012, DOI: 10.1155/2012/302893
Abstract: The current trend of digital convergence leads to the need of the video encoder/decoder (codec) that should support multiple video standards on a single platform as it is expensive to use dedicated video codec chip for each standard. The paper presents a high performance circuit shared architecture that can perform the quantization of five popular video codecs such as H.264/AVC, AVS, VC-1, MPEG-2/4, and JPEG. The proposed quantizer architecture is completely division-free as the division operation is replaced by shift and addition operations for all the standards. The design is implemented on FPGA and later synthesized in CMOS 0.18? m technology. The results show that the proposed design satisfies the requirement of all five codecs with a maximum decoding capability of 60?fps at 187?MHz on Xilinx FPGA platform for 1080?p HD video. 1. Introduction An evident trend in modern world is the digital convergence in the current electronic consumer products. People want the portable devices to have various functions like Video on Demand (VOD), Digital Multimedia Broadcasting (DMB), Global Positioning System (GPS) or the navigation system, Portable Multimedia Player (PMP), and so on. Due to such demand, it is necessary to support the widely used video compression standards in a single system-on-chip (SoC) platform. So the goal is to find a way so that the multicodec system achieves high performance, as well as low cost. Most modern multimedia codecs (both encoder and decoder) employ transform-quantization pair as shown in Figure 1. A significant research has been conducted to combine and efficiently implement the transform units for multiple codecs, but little research is focused on the implementation of multiquantizer unit. A unified Inverse Discrete Cosine Transform (IDCT) architecture to support five standards (such as, AVS, H.264, VC-1, MPEG-2/4, and JPEG) is presented in [1]. A design to support the 4 × 4 transform and quantization of H.264 has been presented in [2]. The 8 × 8 transform and quantization for H.264 is presented in [3] and [4]. Several other designs based on H.264 codec have been reported in [5–10]. The authors in [11] present a design for the quantization for AVS. The design in [12] describes an MPEG-2 encoder. In [13], another JPEG encoder is implemented for images where the quantization block is designed using multiplication and shift operation instead of division. The design in [14] describes a multistandard video decoder to support four codecs—AVS, H.264, VC-1, and MPEG-2. Silicon Image Inc. currently supplies a Multi-standard
Fast Algorithm of A 64-bit Decimal Logarithmic Converter
Ramin Tajallipour,Md. Ashraful Islam,Khan Wahid
Journal of Computers , 2010, DOI: 10.4304/jcp.5.12.1847-1855
Abstract: The paper presents an efficient algorithm to compute base-10 logarithm of a decimal number. The algorithm uses a 64-bit floating-point arithmetic, and is based on a digit-by-digit iterative computation that does not require look-up tables, curve fitting, decimal-binary conversion, or division operations. It is the first FPGA prototype of its kind that uses a 64-bit (decimal 16-digit) precision. Two numerical examples have been presented for the purpose of illustration. The algorithm produces very accurate result with a maximum absolute error of 3.53x10-14. The architecture is pipelined and implemented on to the Xilinx Virtex2p FPGA. It costs 6,752 logic cells, outputs at a minimum rate of 51 mega-samples/sec, and consumes 125.7 mW of power. The scheme is very suitable for timing and accuracy critical applications and compliant with the IEEE754-2008 standard (decimal64 format).
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