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Search Results: 1 - 10 of 326013 matches for " Kankar S. Dasgupta "
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Delay Resistant Transport Protocol for Deep Space Communication  [PDF]
Mohanchur Sarkar, Kaushal K. Shukla, Kankar S. Dasgupta
Int'l J. of Communications, Network and System Sciences (IJCNS) , 2011, DOI: 10.4236/ijcns.2011.42015
Abstract: The throughput of conventional transport protocols suffers significant degradation with the increased Round Trip Time (RTT) typically seen in deep space communication. This paper proposes a Delay Resistant Transport Protocol (DR-TCP) for point-to-point communication in deep space exploration missions. The issues related to deep space communication protocol design and the areas where modifications are necessary are investigated, and a protocol is designed that can provide good throughput to the applications using a deep space link. The proposed protocol uses a cross layer based approach to find the allocated bandwidth and avoids initial bandwidth estimation. A novel timeout algorithm estimates the timeout duration with an objective to maximize throughput and avoid spurious timeout events. The protocol is evaluated through extensive simulations in ns2 considering high RTT values typically seen in Lunar and Mars Exploration Networks under different conditions of packet error rates. DR-TCP provides a significant increase in the throughput as compared to traditional transport protocols under the same conditions. A novel adaptive redundant retransmission algorithm is also presented to take care of the high PER in deep space links. The effect of the Retransmission Frequency has been critically analyzed considering both Lunar and Deep Space scenarios under different levels of PER. The results are very encouraging even in high error conditions. The protocol exhibits a RTT independent behavior in throughput, which is the most desirable quality of a protocol for deep space communication.
Run-Length-Based Test Data Compression Techniques: How Far from Entropy and Power Bounds?—A Survey
Usha S. Mehta,Kankar S. Dasgupta,Niranjan M. Devashrayee
VLSI Design , 2010, DOI: 10.1155/2010/670476
Abstract: The run length based coding schemes have been very effective for the test data compression in case of current generation SoCs with a large number of IP cores. The first part of paper presents a survey of the run length based codes. The data compression of any partially specified test data depends upon how the unspecified bits are filled with 1s and 0s. In the second part of the paper, the five different approaches for “don't care” bit filling based on nature of runs are proposed to predict the maximum compression based on entropy. Here the various run length based schemes are compared with maximum data compression limit based on entropy bounds. The actual compressions claimed by the authors are also compared. For various ISCAS circuits, it has been shown that when the X filling is done considering runs of zeros followed by one as well as runs of ones followed by zero (i.e., Extended FDR), it provides the maximum data compression. In third part, it has been shown that the average test power and peak power is minimum when the don't care bits are filled to make the long runs of 0s as well as 1s. 1. Introduction As a result of the emergence of new fabrication technologies and design complexities, standard stuck-at scan tests are no longer sufficient. The number of tests, corresponding to data volume and test time, increases with each new fabrication process technology just to maintain test quality requirements. Conventional external testing involves storing all test vectors and test response on ATE. But these testers have limited speed, memory, and I/O channels. Testing cannot proceed any faster than the amount of time required to transfer the test data: ?Test time ≥ (amount of test data on tester)/(number of tester channels × tester clock rate) [1]. As a result, some companies are looking for compression well beyond 100X tester cycle reduction [2–4]. The paper is organized as follows. Section 2 describes the test data compression techniques and the qualities of a good technique. Section 3 presents existing run-length-based codes. Section 4 introduces the different methods of do not care bit filling for run-length-based code. Section 5 introduces entropy. Sections 6 and 7 present the experimental results of test data compression and test power with different methods of X filling. Section 8 compares the actual data compression for various methods claimed in literature with maximum possible compression predicted on the basis of entropy. Section 9 analyzes the nature of test data on the basis of various experimental results. Finally conclusions and future work
Configurable Link Layer Security Architecture for Wireless Sensor Networks
Devesh C. Jinwala,Dhiren R. Patel,Kankar S.Dasgupta
Lecture Notes in Engineering and Computer Science , 2008,
Abstract:
Optimizing the Block Cipher Resource Overhead at the Link Layer Security Framework in the Wireless Sensor Networks
Devesh C. Jinwala,Dhiren R. Patel,Kankar S. Dasgupta
Lecture Notes in Engineering and Computer Science , 2008,
Abstract:
Optimizing the Replay Protection at the Link Layer Security Framework in Wireless Sensor Networks
Devesh C. Jinwala,Dhiren R. Patel,Sankita Patel,Kankar S. Dasgupta
Computer Science , 2012,
Abstract: Ensuring communications security in Wireless Sensor Networks (WSNs) is very vital because the security protocols therein, should be devised to work at the link layer. Theoretically, any link layer security protocol must support three vital security attributes viz. Confidentiality, Message Integrity and Replay protection. However, in order to ensure lesser overhead, replay protection is often not incorporated as part of the link layer security framework. We argue here, that it is essential to implement replay protection at the link layer only and devise a simple scheme to do so. We first survey the common approaches to ensuring replay protection in conventional networks. We also implement the conventional algorithms for replay protection using the link layer framework for WSNs viz. TinySec as the underlying platform. Subsequently analyzing their limitations, we propose a novel Bloom-filter based replay protection algorithm for unicast communications. We show that our algorithm is better than the other contemporary approaches for ensuring replay protection in unicast communications in the WSNs.
Link Layer Correction Techniques and Impact on TCP’s Performance in IEEE 802.11 Wireless Networks  [PDF]
Purvang Dalal, Mohanchur Sarkar, Kankar Dasgupta, Nikhil Kothari
Communications and Network (CN) , 2014, DOI: 10.4236/cn.2014.62007
Abstract:

TCP performance degrades when end-to-end connections extend over wireless links which are characterized by high Bit Error Rate and intermittent connectivity. Such degradation is mainly accounted for TCP’s unnecessary congestion control actions while attempting TCP loss recovery. Several independent link loss recovery approaches are proposed by researchers to reduce number of losses visible at TCP. In this paper we first presented a survey of loss mitigation techniques at wireless link layer. Secondly performance evaluation for TCP through Type 0 Automatic Retransmission Request mechanism in erroneous Wireless LAN is presented. In particular, simulations are performed taking into account the wireless errors introduced over IEEE 802.11 link using a well-established 2-State Markov model. TCP performance is evaluated under different settings for maximum link retransmissions allowed for each frame. Simulation results show that, link retransmission improves TCP performance by reducing losses perceived at TCP sender. However, such improvement is often associated with adverse effect on other TCP parameters that may cost a lot in return under extreme network conditions. In this paper an attempt is made to observe impact of link retransmissions on the performance of multiple TCP flows competing with each other. The analysis presented in this paper signifies the scope for maximizing TCP’s throughput at the least possible cost.

Adaptive TCP: A Sender Side Mechanism with Dynamic Adjustment of Congestion Control Parameters for Performance Improvement in WLAN  [PDF]
Purvang Dalal, Mohanchur Sarkar, Kankar Dasgupta, Nikhil Kothari
Int'l J. of Communications, Network and System Sciences (IJCNS) , 2015, DOI: 10.4236/ijcns.2015.85015
Abstract: This paper presents a sender side only TCP mechanism to prevent compromise for bandwidth utilization in IEEE 802.11 wireless networks. In absence of mechanism for accurate and immediate loss discrimination, the TCP sender unnecessarily reduces its Loss Window in response to the packet losses due to transmission errors. At the same time, frequent transmission losses and associated link retransmissions cause inaccuracy for available bandwidth estimate. The proposal, Adaptive TCP tackles the above issues using two refinements. First, sender estimates the degree of congestion by exploiting the statistics for estimated Round Trip Time (RTT). With this, it prevents unnecessary shrinkage of Loss Window and bandwidth estimate. Second, by concluding the uninterrupted evolution of its sending rate in recent past, the Adaptive TCP advances bandwidth estimate under favorable network conditions. This in turn, facilitates for quick growth in TCP’s sending rate after loss recovery and consequently alleviates bandwidth utilization. The authors implement the algorithm on top of TCP NewReno, evaluate and compare its performance with the wireless TCP variants deployed in current Internet. Through intensive simulations it is demonstrated that the Adaptive TCP outperforms other well-established TCP variants, and yields more than 100% of the throughput performance and more than 60% of improvement for bandwidth utilization, compared to TCP NewReno. The simulation results also demonstrated compatibility of Adaptive TCP in a shared wireless environment.
Suitability of Various Low-Power Testing Techniques for IP Core-Based SoC: A Survey
Usha Mehta,Kankar Dasgupta,Niranjan Devashrayee
VLSI Design , 2011, DOI: 10.1155/2011/948926
Abstract: Test power is the major issue for current generation VLSI testing. It has become the biggest concern for today's SoC. While reducing the design efforts, the modular design approach in SoC (i.e., use of IP cores in SoC) has further exaggerated the test power issue. It is not easy to select an effective low-power testing strategy from a large pool of diverse available techniques. To find the proper solutions for test power reduction strategy for IP core-based SoC, in this paper, starting from the terminology and models for power consumption during test, the state of the art in low-power testing is presented. The paper contains the detailed survey on various power reduction techniques proposed for all aspects of testing like external testing, Built-In Self-Test techniques, and the advances in DFT techniques emphasizing low power. Further, all the available low-power testing techniques are strongly analyzed for their suitability to IP core-based SoC. 1. Introduction The power consumption has been a major challenge to both design and test engineers. The efforts to reduce the power consumption during normal function mode further exaggerated the power consumption problem during test. Generally, a circuit may consume 3–8 times power in the test mode than in the normal mode [1]. As a result, the semiconductor industry is looking for low-power testing techniques [2]. To reduce the cost and time to market, the modular design approach is largely adopted for SoC. The structure of such predesigned, ready-to-use intellectual property (IP) core is often hidden from the system integrator. So testing of such cores is even more daunting. So power reduction during testing of such cores puts many constraints on current low-power testing methodology. To develop the right testing strategy for such SoC, it is necessary to survey all the available low-power testing approaches and find out the suitable approach for such SoC. The paper is organized as follows. Section 2 gives the reasons for very high-power consumption during test and its effects of such high-power consumption on IC. It also includes definitions of various terms related to test power and also explains the model for energy and power. Section 3 contains the various schemes for low-power testing. Section 4 discusses the suitability of each scheme with reference to IP core-based SoC. Section 5 concludes the survey and explores the future scope. 2. Low-Power Test A high density system like ASIC or SoC always demands the nondestructive test which satisfies all the power constraints defined during design phase. On the
FlexiSec: A Configurable Link Layer Security Architecture for Wireless Sensor Networks
Devesh Jinwala,Dhiren Patel,Kankar Dasgupta
Computer Science , 2012,
Abstract: Ensuring communications security in Wireless Sensor Networks (WSNs) indeed is critical; due to the criticality of the resources in the sensor nodes as well as due to their ubiquitous and pervasive deployment, with varying attributes and degrees of security required. The proliferation of the next generation sensor nodes, has not solved this problem, because of the greater emphasis on low-cost deployment. In addition, the WSNs use data-centric multi-hop communication that in turn, necessitates the security support to be devised at the link layer (increasing the cost of security related operations), instead of being at the application layer, as in general networks. Therefore, an energy-efficient link layer security framework is necessitated. There do exists a number of link layer security architectures that offer some combinations of the security attributes desired by different WSN applications. However, as we show in this paper, none of them is responsive to the actual security demands of the applications. Therefore, we believe that there is a need for investigating the feasibility of a configurable software-based link layer security architecture wherein an application can be compiled flexibly, with respect to its actual security demands. In this paper, we analyze, propose and experiment with the basic design of such configurable link layer security architecture for WSNs. We also experimentally evaluate various aspects related to our scheme viz. configurable block ciphers, configurable block cipher modes of operations, configurable MAC sizes and configurable replay protection. The architecture proposed is aimed to offer the optimal level of security at the minimal overhead, thus saving the precious resources in the WSNs.
A Review on Prognosis of Rolling Element Bearings
N.S. Jammu,P.K. Kankar
International Journal of Engineering Science and Technology , 2011,
Abstract: Bearings are amongst the frequently encountered components to be found in rotating machinery. Though inexpensive, their failure can interrupt the production in a plant causing unscheduled downtime and production losses. So the bearing prognosis plays a significant role in reducing plant down time and enhanced operation safety, by estimating the Remaining Useful Life (RUL) of damaged bearing. Admitting the importance of bearing prognosis, this literature reviewattempts to summarize various techniques, methods and models used in the prognosis of bearing till date. The definition of bearing prognosis is discussed in the beginning, followed by classification ofvarious prognostic methods, review of methods used by various investigators in this research domain and concluding the topic with the summary of future research directions.
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