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Search Results: 1 - 10 of 64554 matches for " Huang Yin-he "
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A SVD-Based Approach of Suppressing Transient Interference in High-Frequency Radar
基于矩阵奇异值分解的高频雷达瞬态干扰抑制

Chen Xi-xin,Huang Yin-he,
陈希信
,黄银河

电子与信息学报 , 2005,
Abstract: The transient interferences, such as lightening impulse, meteor trail echoes and so on, have to be suppressed since they severely degrade the detection capability of High Frequency (HF) radar. An approach of suppressing the transient interference based on Singular Value Decomposition (SVD) is presented in this paper. In this approach, the HF radar echo is segmented and all segments constitute the columns of some matrix with its SVD computed. Firstly, it can be preliminarily judged whether the transient interference exists in the HF radar echo from the valid rank of the built matrix. Secondly, the orthogonal decomposition of the HF radar echo is obtained using the orthogonality of SVD, thus the transient interference is separated from the radar echo and so easily detected. Finally, the radar echo segment polluted by the transient interference is estimated by building the all-pole autoregressive linear prediction model. The effectiveness of this approach is demonstrated by examples of measured HF radar echo.
New approaches to test compression for digital circuits
数字电路测试压缩方法研究(英文)

HAN Yin-He,LI Xiao-Wei,
韩银和
,李晓维

中国科学院研究生院学报 , 2007,
Abstract: Test compression has drawn significant attention of academies and industries recently, since it can reduce test data volume and test application time of integrated circuits without losing fault coverage, thus diminishing the gap between the test and manufacture camps. Based on test stimulus and test response, the test compression techniques can be classified to two categories; test stimulus compression and test response compaction. This thesis conducts the research on both fields and presents several compression methods. The contributions of the thesis include: (1)This thesis presents a Variable-Tail code, and shows how to use this code to compress the test stimulus. Variable-Tail code is a variable-length-to-variable-length code. It can achieve higher test compression ratio in the case of high X-bit density. The experimental results show that the compression ratio of Variable-Tail with the proposed reordering algorithm is close to the theoretical upper bound of predictive codes (the average distance is only about 1.26%), while up to 20% of test power is saved. (2) This thesis presents the parallel core wrapper design. Studying on the distributions of X-bit, we find the phenomenon of full overlapping and partial overlapping of scan slices. When the slices overlap continuously, they can be loaded only once, thus test application time and test power are significantly saved. The experimental results show when the parallel core wrapper design is applied, compared with the serial core wrapper design, the test application time is reduced to 2/3 and test power is reduced to 1/15. (3)The 3X compression architecture is the main contribution of this thesis. The 3X architecture consists of three parts: X-Config stimulus compression, X-Balance test generation and X-Tolerant response compaction. X-Config stimulus decompression uses a periodically alterable MUXs network. X-Balance test generation considers the dynamic compaction, compression, scan chain design and periodically alterable MUXs network as a whole. It applies two algorithms: one is the backward patterns remove algorithm and the other one is the specified bits based scan chain design algorithm. X-Tolerant response compaction uses a single-output compactor based on convolutional code. Since only one output pin is needed, X-Tolerant response compaction guarantees the highest compaction ratio. In order to achieve the X-Tolerant capacity, a multiple-weights basic check matrix generation algorithm is presented.
Survey on post-silicon debug for multi-core processor
多核处理器硅后调试技术研究最新进展

GAO Jian-liang,HAN Yin-he,
高建良
,韩银和

计算机应用研究 , 2013,
Abstract: This paper surveyed the post-silicon debug of uncertain bugs in multi-core processor. Firstly, it presented the challenges of debugging multi-core processor, especially for uncertain bugs. Then, it introduced and analyzed the state-of-the-art solutions for post-silicon debug in detail. Furthermore, it discussed the advantages and disadvantages of the existing methods. Finally, it concluded the hot topics of the current research and also presented the future directions.
Two-dimensional planar shape congruence control design for a class of nonlinear systems with two inputs
一类双输入非线性系统的二维平面形状合同控制器设计

WANG Yin-he,HAN Dong-fang,
王银河
,韩东方

控制理论与应用 , 2008,
Abstract: Based on the curve theory in differential geometry, we introduce for general control systems the concepts of shape variable, the controlled shape-trace curve and the shape congruence control. By employing the signed curvature, we design a two-dimensional planar shape congruence controller for a class of nonlinear systems with binary input and binary shape variables. This controller ensures the shape of the controlled shape-trace curve to be the same as the shape of the reference trace curve. Simulation results show the validity of the method.
Adaptive observer design for a class of nonlinear uncertain systems based on fuzzy logic systems
一类基于模糊逻辑系统的非线性不确定系统自适应观测器设计

WANG Yin-he,DAI Guan-zhong,
王银河
,戴冠中

控制理论与应用 , 2003,
Abstract: By employing fuzzy logic system with the properties of fully utilizing linguistic information from experts and approximating any continuous function with arbitrariness, the adaptive laws and state observers were synthesized for a class of nonlinear systems with uncertainties, the bounded functions of which were unknown. The architecture of laws and observers depended directly on the information from the construction of the systems controlled and the fuzzy logic system. Under some simple conditions, the laws and state observers made the state error of systems controlled and parameter estimate errors uniformly ultimately bounded (UUB). Finally, the simulation shows the validity of the method.
Tracking control synthesis for a class of uncertain nonlinear systems based on partition of unity
基于单位分解的一类非线性不确定系统跟踪控制设计

WANG Yin-he,ZHANG Si-ying,
王银河
,张嗣瀛

控制理论与应用 , 2006,
Abstract: By utilizing the property that partition of unity can approximate any continuous function on the compact set at arbitrary precision, the robust tracking controllers with adaptive laws are designed for a class of uncertain nonlinear systems. The results show that the tracking errors converge to a small neighborhood of zero and all states in the closed-loop system are bounded via the controllers. Finally, the simulations show the validity of the method adopted in this paper.
Adaptive fuzzy control for a class of nonlinear uncertain systems
一类非线性不确定系统的模糊自适应控制

WANG Yin-he,DAI Guan-zhong,
王银河
,戴冠中

控制理论与应用 , 2004,
Abstract: By employing fuzzy logic system with the property of approximating any continuous function with arbitrary, the adaptive laws and controllers are synthesized for a class of nonlinear systems with uncertainties, the bounded functions of which are unknown. The architecture of laws and controllers depends directly on the information from the construction of the nominal systems of systems controlled and the fuzzy logic system. Under some simple conditions, the laws and controllers make the states of systems controlled and parameter estimate errors uniformly ultimately bounded (UUB). Finally, the simulation shows the validity of the method in this paper.
Coordination strategy for closed-loop supply chain with price-discount contract
价格折扣契约下应对突发事件下的闭环供应链协调策略

WANG Xu,ZHANG Nan,WANG Yin-he,
王 旭
,张 男,王银河

计算机应用研究 , 2012,
Abstract: For a closed-loop supply chain according to the MRCRM model facing stochastic market demand, this paper analyzed the coordination function with price-discount contract. For the problem of the closed-loop supply chain coordination might be broken off by an emergent event, this paper put forward an price-discount contract which had anti-disruption-ability for closed-loop supply chain. Finally, it gave an application.
Evaluation of the suitability of emergent medical technology in earthquake relief
Rong-rong LIU,Yin-he QIN,Lin ZHOU,Qian-sheng LI
Medical Journal of Chinese People's Liberation Army , 2011,
Abstract: In order to establish the reasonable methods to evaluate the suitability of emergent medical technology in earthquake relief,the suitability evaluation system,including 3 I-grade indexes and 8 II-grade indexes,was established by consulting specialists on the basis of systemic analysis of the influential factors.The weights of the indexes were determined by analytic hierarchy process,and the mathematical model of suitability evaluation was built up by a weighted sum of the indexes.The established evaluation method has been proved effective by an empirical study consisting of 12 common emergent medical technology.
Leakage Current Optimization Techniques During Test Based on Don’t Care Bits Assignment
Leakage Current Optimization Techniques During Test Based on Don t Care Bits Assignment

Wei Wang,Yu Hu,Yin-He Han,Xiao-Wei Li,You-Sheng Zhang,
Wei Wang
,Yu Hu,Yin-He Han,Xiao-Wei Li,and You-Sheng Zhang

计算机科学技术学报 , 2007,
Abstract: It is a well-known fact that test power consumption may exceed that during functional operation. Leakage power dissipation caused by leakage current in Complementary Metal-Oxide-Semiconductor (CMOS) circuits during test has become a significant part of the total power dissipation. Hence, it is important to reduce leakage power to prolong battery life in portable systems which employ periodic self-test, to increase test reliability and to reduce test cost. This paper analyzes leakage current and presents a kind of leakage current simulator based on the transistor stacking effect. Using it, we propose techniques based on don't care bits (denoted by Xs) in test vectors to optimize leakage current in integrated circuit (IC) test by genetic algorithm. The techniques identify a set of don't care inputs in given test vectors and reassign specified logic values to the X inputs by the genetic algorithm to get minimum leakage vector (MLV). Experimental results indicate that the techniques can effectually optimize leakage current of combinational circuits and sequential circuits during test while maintaining high fault coverage. Electronic supplementary material The online version of this article (doi:) contains supplementary material, which is available to authorized users. This work was supported in part by the National Natural Science Foundation of China (NSFC) under Grant Nos. 60576031, 60633060, 60606008, 90607010, the National Grand Fundamental Research 973 Program of China under Grant Nos. 2005CB321604 and 2005CB321605, and the Science Foundation of Hefei University of Technology under Grant Nos. 070501F and 060501F. Y. Han's work is also supported by the fund of Chinese Academy of Sciences due to the President Scholarship.
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