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Search Results: 1 - 10 of 197988 matches for " N. Collaert "
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Coherent transport through a double donor system in silicon
J. Verduijn,G. C. Tettamanzi,G. P. Lansbergen,N. Collaert,S. Biesemans,S. Rogge
Physics , 2009, DOI: 10.1063/1.3318271
Abstract: Quantum coherence is of crucial importance for the applicability of donor based quantum computing. In this Letter we describe the observation of the interference of conduction paths induced by two donors in a nano-MOSFET resulting in a Fano resonance. This demonstrates the coherent exchange of electrons between two donors. In addition, the phase difference between the two conduction paths can be tuned by means of a magnetic field, in full analogy to the Aharonov-Bohm effect.
Tunable Kondo effect in a single donor atom
G. P. Lansbergen,G. C. Tettamanzi,J. Verduijn,N. Collaert,S. Biesemans,M. Blaauboer,S. Rogge
Physics , 2009, DOI: 10.1021/nl9031132
Abstract: The Kondo effect has been observed in a single gate-tunable atom. The measurement device consists of a single As dopant incorporated in a Silicon nanostructure. The atomic orbitals of the dopant are tunable by the gate electric field. When they are tuned such that the ground state of the atomic system becomes a (nearly) degenerate superposition of two of the Silicon valleys, an exotic and hitherto unobserved valley Kondo effect appears. Together with the regular spin Kondo, the tunable valley Kondo effect allows for reversible electrical control over the symmetry of the Kondo ground state from an SU(2)- to an SU(4) -configuration.
Transport spectroscopy of a single dopant in a gated silicon nanowire
H. Sellier,G. P. Lansbergen,J. Caro,N. Collaert,I. Ferain,M. Jurczak,S. Biesemans,S. Rogge
Physics , 2006, DOI: 10.1103/PhysRevLett.97.206805
Abstract: We report on spectroscopy of a single dopant atom in silicon by resonant tunneling between source and drain of a gated nanowire etched from silicon on insulator. The electronic states of this dopant isolated in the channel appear as resonances in the low temperature conductance at energies below the conduction band edge. We observe the two possible charge states successively occupied by spin-up and spin-down electrons under magnetic field. The first resonance is consistent with the binding energy of the neutral $D^0$ state of an arsenic donor. The second resonance shows a reduced charging energy due to the electrostatic coupling of the charged $D^-$ state with electrodes. Excited states and Zeeman splitting under magnetic field present large energies potentially useful to build atomic scale devices.
Sub-threshold channels at the edges of nanoscale triple-gate silicon transistors
H. Sellier,G. P. Lansbergen,J. Caro,N. Collaert,I. Ferain,M. Jurczak,S. Biesemans,S. Rogge
Physics , 2006, DOI: 10.1063/1.2476343
Abstract: We investigate by low-temperature transport experiments the sub-threshold behavior of triple-gate silicon field-effect transistors. These three-dimensional nano-scale devices consist of a lithographically defined silicon nanowire surrounded by a gate with an active region as small as a few tens of nanometers, down to 50x60x35 nm^3. Conductance versus gate voltage show Coulomb-blockade oscillations with a large charging energy due to the formation of a small potential well below the gate. According to dependencies on device geometry and thermionic current analysis, we conclude that sub-threshold channels, a few nanometers wide, appear at the nanowire edges, hence providing an experimental evidence for the corner-effect.
Advanced CMOS device technologies for 45 nm node and below
A. Veloso, T. Hoffmann, A. Lauwers, H. Yu, S. Severi, E. Augendre, S. Kubicek, P. Verheyen, N. Collaert, P. Absil, M. Jurczak and S. Biesemans
Science and Technology of Advanced Materials , 2007,
Abstract: We review and discuss the latest developments and technology options for 45 nm node and below, with scaled planar bulk MOSFETs and MuGFETs as emerging devices. One of the main metal gate (MG) candidates for scaled CMOS technologies are fully silicided (FUSI) gates. In this work, by means of a selective and controlled poly etch-back integration process, dual work-function Ni-based FUSI/HfSiON CMOS circuits with record ring oscillator performance (high-VT) are reported (17 ps at VDD=1.1 V and 20 pA/μm Ioff), meeting the ITRS 45 nm node requirement for low-power (LP) CMOS. Compatibility of FUSI and other MG with known stress boosters like stressed CESL (contact-etch-stop-layer with high intrinsic stress) or embedded SiGe in the pMOS S/D regions is validated. To obtain MuGFET devices that are competitive, as compared to conventional planar bulk devices, and that meet the stringent drive and leakage current requirements for the 32 nm node and beyond, higher channel mobilities are required. Results obtained by several strain engineering methods are presented here.
Lifetime enhanced transport in silicon due to spin and valley blockade
G. P. Lansbergen,R. Rahman,J. Verduijn,G. C. Tettamanzi,N. Collaert,S. Biesemans,G. Klimeck,L. C. L. Hollenberg,S. Rogge
Physics , 2010, DOI: 10.1103/PhysRevLett.107.136602
Abstract: We report the observation of Lifetime Enhanced Transport (LET) based on perpendicular valleys in silicon by transport spectroscopy measurements of a two-electron system in a silicon transistor. The LET is manifested as a peculiar current step in the stability diagram due to a forbidden transition between an excited state and any of the lower energy states due perpendicular valley (and spin) configurations, offering an additional current path. By employing a detailed temperature dependence study in combination with a rate equation model, we estimate the lifetime of this particular state to exceed 48 ns. The two-electron spin-valley configurations of all relevant confined quantum states in our device were obtained by a large-scale atomistic tight-binding simulation. The LET acts as a signature of the complicated valley physics in silicon; a feature that becomes increasingly important in silicon quantum devices.
Electric field reduced charging energies and two-electron bound excited states of single donors in silicon
R. Rahman,G. P. Lansbergen,J. Verduijn,G. C. Tettamanzi,S. H. Park,N. Collaert,S. Biesemans,G. Klimeck,L. C. L. Hollenberg,S. Rogge
Physics , 2011, DOI: 10.1103/PhysRevB.84.115428
Abstract: We present atomistic simulations of the D0 to D- charging energies of a gated donor in silicon as a function of applied fields and donor depths and find good agreement with experimental measure- ments. A self-consistent field large-scale tight-binding method is used to compute the D- binding energies with a domain of over 1.4 million atoms, taking into account the full bandstructure of the host, applied fields, and interfaces. An applied field pulls the loosely bound D- electron towards the interface and reduces the charging energy significantly below the bulk values. This enables formation of bound excited D-states in these gated donors, in contrast to bulk donors. A detailed quantitative comparison of the charging energies with transport spectroscopy measurements with multiple samples of arsenic donors in ultra-scaled FinFETs validates the model results and provides physical insights. We also report measured D-data showing for the first time the presence of bound D-excited states under applied fields.
Thermionic Emission as a tool to study transport in undoped nFinFETs
Giuseppe C. Tettamanzi,Abhijeet Paul,Gabriel P. Lansbergen,Jan Verduijn,Sunhee Lee,Nadine Collaert,Serge Biesemans,Gerhard Klimeck,Sven Rogge
Physics , 2010, DOI: 10.1109/LED.2009.2036134
Abstract: Thermally activated sub-threshold transport has been investigated in undoped triple gate MOSFETs. The evolution of the barrier height and of the active cross-section area of the channel as a function of gate voltage has been determined. The results of our experiments and of the Tight Binding simulations we have developed are both in good agreement with previous analytical calculations, confirming the validity of thermionic approach to investigate transport in FETs. This method provides an important tool for the improvement of devices characteristics.
Interface Trap Density Metrology of state-of-the-art undoped Si n-FinFETs
Giuseppe Carlo Tettamanzi,Abhijeet Paul,Sunhee Lee,Saumitra R. Mehrotra,Nadine Collaert,Serge Biesemans,Gerhard Klimeck,Sven Rogge
Physics , 2010,
Abstract: The presence of interface states at the MOS interface is a well-known cause of device degradation. This is particularly true for ultra-scaled FinFET geometries where the presence of a few traps can strongly influence device behavior. Typical methods for interface trap density (Dit) measurements are not performed on ultimate devices, but on custom designed structures. We present the first set of methods that allow direct estimation of Dit in state-of-the-art FinFETs, addressing a critical industry need.
Implementation of a Higher Quality dc Power Converter  [PDF]
N. N. Barsoum
Journal of Electromagnetic Analysis and Applications (JEMAA) , 2010, DOI: 10.4236/jemaa.2010.22012
Abstract: Many single and three-phase converters are well developed, and covered up in most of electric markets. It is used in many applications in power systems and machine drives. However, an exact definite output signal from the dc side still not recognized. The waveforms of output voltage and current demonstrate an imperfect dc signal and constitute losses, harmonic distortion, low power factor, and observed some ripples. An approximately perfect rectifier bridge is the aim of this research. Perhaps it gives the ability to identify the parameters of the converter to obtain, as much as possible, a perfect dc signal with less ripple, high power factor and high efficiency. Design is implemented by simulation on Power Simulator PSIM, and practically, a series regulator LM723 is applied to provide regulating output voltage. Comparisons of both simulation and hardware results are made to observe differences and similarities.
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