Abstract:
The present paper is an attempt to develop a new heuristic algorithm, find the optimal sequence to minimize the utilization time of the machines and hence their rental cost for two stage specially structured flow shop scheduling under specified rental policy in which processing times and set up time are associated with their respective probabilities including transportation time. Further jobs are attached with weights to indicate their relative importance. The proposed method is very simple and easy to understand and also provide an important tool for the decision maker. Algorithm is justified by numerical illustration. Keywords: Specially Structured Flow Shop Scheduling, Rental Policy, Processing Time, Weight Age of Jobs, Set Up, Transportation Time.

Abstract:
This paper discusses an efficient heuristic to minimize the makespan of scheduling n independent jobs on m unrelated parallel machines. The problem of scheduling the jobs on the unrelated parallel machines is combinatorial in nature. Hence, the heuristic approach is inevitable for quicker solution. In this paper, a simple and efficient heuristic is designed to minimize the makespan of scheduling n independent jobs on m unrelated parallel machines. A mathematical model is also presented for this problem. A factorial experiment is used to compare the results of the proposed heuristic with that of a mathematical model by taking “Method” (Heuristic and Model) as the first factor and “Problem Size” (No. of machines X No. of Jobs: 2X5, 2X6, ……, 2X9, 3X5, 3X6, ……, 3X9, ……., 5X5, 5X6, …5X9) as the second factor. It is found that there is no significant difference between the results of the proposed heuristic and that of the mathematical model. Further, the mean percent error of the results obtained by the heuristic from the optimal results obtained by the model is 2.336 %. The heuristic gives optimal solution for 76.67 % of the problems.

Abstract:
This paper considers the single machine scheduling problem with uniform parallel machines in which the objective is to minimize the makespan. Four different GA based heuristics are designed by taking different combinations of crossover methods, viz. single point crossover method and two point crossover method, and job allocation methods while generating initial population, viz. equal number of jobs allocation to machines and proportionate number of jobs allocation to machines based on machine speeds. A detailed experiment has been conducted by assuming three factors, viz. Problem size, crossover method and job allocation method on 135 problem sizes each with two replications generated randomly. Finally, it is suggested to use the GA based heuristic with single point crossover method, in which the proportionate number of jobs allocated to machines based on machine speeds.

Abstract:
Printed circuit boards (PCBs) are extensively used in diverse electronic products today.The placement process is generally the bottleneck in a PCB assembly line. Many researchers have indicated that an optimal component placement sequence reduces the cycle time of an assembly line with single placement machines. However, in current PCB assembly lines, more than one placement machine, including Pick-and-Place and Chip Shooter machines, are concurrently used. Therefore, in the PCB assembly lines with multiple placement machines, the improvement of a single placement machine is no longer an issue in increasing throughput rate. The line balancing tasks within machines has a greater impact on the throughput rate. This research uses a hybrid heuristic approach in designing a prototype system to implement line balancing tasks within the multiple placement machines of a PCB assembly line. First a minimum spanning tree algorithm is introduced to solve the problem in allocating components to various feeder slots. Then, by incorporating with the initial results of this step, a mathematical model is developed to solve the line balancing problem faced in the assembly line. The developed line balancing model uses the combination of formulations and experts＇ reasoning knowledge to rearrange the component groups which are placed by the placement machines. The proposed system model is used to construct a prototype system that assists the process planners to reduce the cycle time of the assembly line so as to increase the throughput rate.

Abstract:
Chip attach is the bottleneck operation in semiconductor assembly. Chip attach scheduling is in nature unrelated parallel machine scheduling considering practical issues, for example, machine-job qualification, sequence-dependant setup times, initial machine status, and engineering time. The major scheduling objective is to minimize the total weighted unsatisfied Target Production Volume in the schedule horizon. To apply -learning algorithm, the scheduling problem is converted into reinforcement learning problem by constructing elaborate system state representation, actions, and reward function. We select five heuristics as actions and prove the equivalence of reward function and the scheduling objective function. We also conduct experiments with industrial datasets to compare the -learning algorithm, five action heuristics, and Largest Weight First (LWF) heuristics used in industry. Experiment results show that -learning is remarkably superior to the six heuristics. Compared with LWF, -learning reduces three performance measures, objective function value, unsatisfied Target Production Volume index, and unsatisfied job type index, by considerable amounts of 80.92%, 52.20%, and 31.81%, respectively. 1. Introduction Semiconductor manufacturing consists of four basic steps: wafer fabrication, wafer sort, assembly, and test. Assembly and test are back-end steps. Semiconductor assembly contains many operations, such as reflow, wafer mount, saw, chip attach, deflux, EPOXY, cure, and PEVI. IS factory is a site for back-end semiconductor manufacturing where chip attach is the bottleneck operation in the assembly line. In terms of Theory of Constraints (TOC), the capacity of a shop floor depends on the capacity of the bottleneck, and a bottleneck operation gives a tremendous impact upon the performance of the whole shop floor. Consequently, scheduling of chip attach station has a significant effect on the performance of the assembly line. Chip attach is performed in a station which consists of ten parallel machines; thus, chip attach scheduling in nature is some form of unrelated parallel machine scheduling under certain realistic restrictions. Research on unrelated parallel machine scheduling focuses on two sorts of criteria: completion time or flow time related criteria and due date related criteria. Weng et al. [1] proposed a heuristic algorithm called “Algorithm 9” to minimize the total weighted completion time with setup consideration. Algorithm 9 was demonstrated to be superior to six heuristic algorithms. Gairing et al. [2] presented an effective

Abstract:
Scheduling is an enduring process where the existence of real time information frequently forces the review and modification of pre-established schedules. The real world is complex and complexity generally arises from uncertainty. From this prospective the concept of fuzziness is introduced in the field of scheduling. The present paper pertains to a bi-criterion in n-jobs, three machines flowshop scheduling to minimize the makespan and the rental cost of the machines taken on rent under a specified rental policy in which processing time, transportation time are in fuzzy environment and are represented by triangular fuzzy membership function. Further, the concept of job block to represent the relative importance of some jobs over other is also introduced. A heuristic algorithm to find optimal or near optimal sequence optimizing the bi-criteria is discussed. A numerical illustration is given to demonstrate the computational efficiency of proposed algorithm.

Abstract:
This paper proposes a heuristic algorithm, called list-based squeezing branch and bound algorithm, for solving a machine-fixed, machining-assembly flowshop scheduling problem to minimize makespan. The machine-fixed, machining-assembly flowshop consists of some parallel two-machine flow lines at a machining stage and one robot at an assembly stage. Since an optimal schedule for this problem is not always a permutation schedule, the proposed algorithm first finds a promising permutation schedule, and then searches better non-permutation schedules near the promising permutation schedule in an enumerative manner by elaborating a branching procedure in a branch and bound algorithm. The results of numerical experiments show that the proposed algorithm can efficiently provide an optimal or a near-optimal schedule with high accuracy such as mean relative error being less than 0.2% and the maximum relative error being at most 3%.

Abstract:
This paper is an attempt to study general flow shop scheduling problem in which processing time of jobs is associated with probabilities under no-idle constraint. The objective of this paper is to develop a heuristic algorithm to flowshop scheduling so that no machine remains idle during working for any given sequence of jobs. The proposed algorithm is simple, and easy to understand and provides an important tool in many practical situations for minimizing the expected hiring cost of the machines for a fixed sequence of job processing. A numerical illustration is also given to justify the proposed algorithm. 1. Introduction In flow shop scheduling problems, the objective is to obtain a sequence of jobs which when processed on the machines will optimize some well-defined criteria. Every job will go on these machines in a fixed order of machines. The research into flow shop problems has drawn a great attention in the last decades with the aim to increase the effectiveness of industrial production. Johnson [1] gave procedure for finding the optimal schedule for -jobs, two-machine flow-shop problem with minimization of the makespan (i.e., total elapsed time) as the objective. Ignall and Scharge [2] applied Branch and Bound technique for obtaining a sequence which minimizes the total flow time. In addition Adiri and Pohoryles [3] elucidated no-idle scheduling to minimize the sum of completion time. Rajendran and Chaudhuri [4] have given conditions to obtain a sequence which minimizes total flow time subject to minimum makespan in a two-stage flow shop problem. Szwarc [5], Yoshida and Hitomi [6], Anup [7], and so forth, derived the optimal algorithm for two/three or multistage flow shop problems taking into account the various constraints and criteria. Singh et al. [8] associated probabilities with processing time and setup time in their studies. Later, Gupta et al. [9] and Gupta and Singh [10] studied general flow shop problem to minimize rental cost under a predefined rental policy in which the probabilities have been associated with processing time on each machine and other scheduling problems by considering various parameters like transportation, idle/waiting operator, and so forth. Narain and Bagga [11–13] studied the flow shop problem with the objective being total rental cost. The total rental cost is minimized when idle time on all the machines is zero. Under the no-idle situation, machines work continuously without any break; that is, machines should not remain idle once they start processing the first job. The no-idle situation arises in real life

Abstract:
With the emergence of distributed systems, the problem of task scheduling has been arousing attention in recent past. Task scheduling is a NP-complete problem and it is more complicated under the distributed heterogeneous computing environment. To harness the potential of these systems, efficient scheduling algorithms are needed. This paper proposes a new distributed scheduling algorithm for independent tasks to be assigned optimally amongst available machines. The approach works in two phases. In first phase, it assigns a task according to the Min-min heuristic and in second phase, it improves the scheduling by using efficient refinery scheduling heuristic. The refinery heuristic balances the load across all the machines and reduces the make-span time of jobs. The results obtained using the proposed heuristic improves over the existing approaches.

Abstract:
This paper considers a material constrained component scheduling problem during the high speed surface mount manufacturing stage in printed circuit board (PCB) assembly, where each piece of board contains an even number of identical PCBs. To accomplish the production, material requirements must be predetermined and incorporated as restraints into the scheduling problem, which has the objective of minimizing production completion time (makespan). A solution procedure is developed based on the following strategies: 1) Each machine is responsible for the same PCBs of each piece, 2) Components of the same types may use one or more feeder locations, 3) Component types are clustered based on their suitable placement speeds, 4) A heuristic using a bottom-up approach is applied to determine the component placement sequence and the feeder location assignment for all machines. Velocity estimate functions of the turret, XY table, and feeder carriage were derived based on empirical data. An experiment using Fuji CP732E machines was conducted on two real life instances. Experimental results indicate that our method performs 32.96% and 10.60% better than the Fuji-CP software for the two instances, in terms of the makespan per piece of board.