Abstract:
The work deals with the design of the 12-bit Delta-Sigma modulator using switched capacitors (SC) technique. The modulator serves to vibration sensor output processing. The first part describes the Delta-Sigma modulator parameters definition. Results of the proposed topology ideal model were presented as well. Next, the Delta-Sigma modulator circuitry on the transistor level was done. The ONSemiconductor I2T100 0.7 um CMOS technology was used for design. Then, the Delta-Sigma modulator nonidealities were simulated and implemented into the MATLAB ideal model of the modulator. The model of real Delta-Sigma modulator was derived. Consequently, modulator coefficients were optimized. Finally, the corner analysis of the Delta-Sigma modulator with the optimized coefficients was simulated. The value of SNDR = 82.2 dB (ENOB = 13.4 bits) was achieved.

Abstract:
The paper deals with a novel approach to processing of pressure sensor signals. A bandpass sigma-delta modulator is used for this purpose. This technique is relatively new and it is not used widely, because this kind of modulator is usually utilized for wireless and video applications. Since the bandpass sigma-delta modulator works within its defined band it is resistant to offsets of its sub-circuits. The main stages of this modulator are implemented by means of switched-capacitor (SC) technique. The article presents the basic ideas of this approach and simulation results of the first order of ideal and real modulator. The paper also shows the design of the phase locked loop (PLL) block for synchronization of sensor signal and modulator driving signal. The simple evaluation board was fabricated for confirmation of the proposed principle. Also shown are the results of the chip testing, the modulator layout and the design and test results of the second order of bandpass sigma-delta modulator briefly.

Abstract:
In the paper defines a boundary of stability zone for sigma-delta modulator. The boundary depends from inner sigma-delta modulator coefficients. For designing purposes such result could be used to find or compare some appropriate schemes with each other. It is proved some statements and showed that boundary could be found theoretically for any order of sigma-delta modulator, but practically till 5-th order.

Abstract:
The paper involves the simulation and design of a fully differential common mode feedback circuit for a two stage Oper`ational Transconductance Amplifier. This OTA serves as the loop filter for a delta sigma modulator in 180nm Technology. Simulations were performed in Cadence software. Step response and ac analysis of the OTA was also conducted. The nonlinearity characteristics of OTA were studied by performing Harmonic Distortion Analysis.

Abstract:
As a part of wider project sigma-delta modulator was designed. It represents an A/D part of a power meter IC. Requirements imposed were: SNDR and dynamic range > 50 dB for maximum input swing of 250 mV differential at 50 Hz. Over sampling ratio is 128 with clock frequency of 524288 Hz which gives bandwidth of 2048 Hz. Circuit is designed in 3.3 V supply standard CMOS 0.35 μm technology.

Abstract:
In this Survey paper, the performance of sigma delta modulator is measured and observed in the terms of signal to Noise ratio, for different Oversampling ratios for different order of Quantizer bit. Also the sigma delta modulator is analysed for different quantization level for the different parameters like Signal to noise distortion ratio, quantization noise rejection capability.

Abstract:
A/D conversion at an early stage plays an important role for achieving such flexibility at the receiver. Analogto-Digital-Converter (ADC) constitutes a necessary component for the implementation of Software Defined- Radio (SDR) receiver. The goal of this paper is to present the behavioral models, implemented in the Matlab/Simulink environment. The SDR toolbox allows us to simulate at behavioral level most of the switched-capacitor (SC) sigma-delta (∑ ) Modulator non-idealities, such as sampling jitter, kT/C noise and operational amplifier limitations (finite bandwidth, finite DC gain, slew rate and saturation). Although very effective in simulating wide-band, medium-resolution !" converters the lack of a model for flicker noise and multi-bit quantizers makes this toolbox less attractive for simulating narrow band high resolution converters. The proposed extension not only fixes this limitation, but introduces a predictive model of the effect of capacitor mismatch in the internal multi-bit D/A converter.

Abstract:
To improve the simulation accuracy of SIMULINK,a novel inclusive beha vior model of an integrator is proposed that introduces the effects of different circuit nonidealities of a switched-capacitor sigma-delta modulator into SIMULIK simulation.The nonlinear DC gain and nonlinear settling process are introduced into the op-amp module.The signal-dependent charge injection and nonlinear resistance are introduced into the switch module.In addition,the noise source in cluding flicker and thermal noise is introduc...

Abstract:
In this paper, new complex band pass filter architecture for continuous time complex band pass sigma delta modulator is presented. In continuation of paper the modulator is designed for GPS and Galileo receiver. This modulator was simulated in standard 0.18 μm CMOS TSMC technology and has bandwidth of 2MHz and 4MHz for GPS and Galileo centered in 4.092 MHz. The dynamic range (DR) is 56.5/49 dB (GPS/Galileo) at sampling rate of 125 MHz. The modulator has power consumption of 4.1 mw with 3 V supply voltage.