New Voltage Differencing Differential Input Buffered Amplifier (VD-DIBA)
based lossless grounded and floating inductance simulation circuits have been
proposed. The proposed grounded simulated inductance circuit employs a single
VD-DIBA, one floating resistance and one grounded capacitor. The floating
simulated inductance (FI) circuits employ two VD-DIBAs with two passive
components (one floating resistance and one grounded capacitor). The circuit
for grounded inductance does not require any realization conditions where as in
case of floating inductance circuits, a single matching condition is needed.
Simulation results demonstrating the applications of the new simulated
inductors using CMOS VD-DIBAs have been included to confirm the workability of
the new circuits.

Abstract:
Current differencing transconductance amplifier (CDTA) is receiving considerable attention as a building block for current-mode (CM) analog signal processing / signal generation. In this paper, new CDTA based lossless grounded and floating inductance simulation circuits have been proposed. The proposed grounded simulated inductance circuit employs two CDTAs and a single grounded capacitor whereas the floating simulated inductance circuit employs three CDTAs and a grounded capacitor. The circuit for grounded inductance does not require any realization conditions whereas in case of floating inductance only equality of two transconductances is needed (which can be easily maintained in practice by ensuring equal dc bias currents in the two transconductance amplifiers). Some sample results demonstrating the applications of the new simulated inductors using CMOS CDTAs have been given to confirm the workability of the new circuits.

Abstract:
A new active circuit is proposed for the realisation of lossless grounded and floating inductance employing Voltage Differencing Differential Input Buffered Amplifiers (VD-DIBAs). The proposed grounded simulated inductance circuit employs two VD-DIBAs and a single-grounded capacitor whereas the floating simulated inductance circuit employs three VD-DIBAs and a grounded capacitor. The circuit for grounded inductance does not require any realization conditions whereas in case of floating inductance, only equality of two transconductances is needed. Some sample results demonstrating the applications of the new simulated inductors using VD-DIBAs have been given to confirm the workability of the new circuits. 1. Introduction Several synthetic grounded and floating inductance circuits using different active elements such as operational amplifiers (op-amps) [1–5], current conveyors (CCs) [6–13], current controlled conveyors (CCCIIs) [14, 15], current feedback operational amplifiers (CFOAs) [16], operational mirrored amplifiers (OMAs) [17], differential voltage current conveyors (DVCCIIs) [18], current differencing buffered amplifiers (CDBAs) [19–21], current differencing transconductance amplifiers (CDTAs) [22, 23], and operational transconductance amplifier (OTA) [24] are reported in the literature. Recently, various active building blocks have been introduced in [25], VD-DIBA is one of them. Although some applications of VD-DIBAs have been reported in the literature such as in the realization of all pass section [26], to the best knowledge and belief of the authors, no grounded/ floating inductance simulation circuits using VD-DIBAs have yet been reported in the open literature so far. The purpose of this paper is, therefore, to propose new VD-DIBA-based lossless grounded and floating inductance simulation circuits. 2. The Proposed New Configurations The schematic symbol and equivalent model of the VD-DIBA are shown in Figures 1(a) and 1(b) [26]. The model includes two controlled sources: the current source controlled by differential voltage ( - ), with the transconductance？？ , and the voltage source controlled by differential voltage ( - ), with the unity voltage gain. The VD-DIBA can be described by the following set of equations: The proposed configurations are shown in Figures 2 and 3, respectively. Figure 1: (a) Schematic symbol and (b) equivalent model of VD-DIBA [ 26]. Figure 2: Proposed grounded inductance simulation configuration. Figure 3: Proposed floating inductance simulation configuration. A routine analysis of the circuit shown in Figure 2

Abstract:
A generalized circuit based on five positive polarity second-generation current conveyors is introduced. The circuit simulates a floating inductance, capacitor floatation circuit and floating fdnr. All these circuits use grounded capacitors.

Abstract:
In this work, we present new topologies for realizing one lossless grounded inductor and two floating, one lossless and one lossy, inductors employing a single differential difference current conveyor (DDCC) and a minimum number of passive components, two resistors, and one grounded capacitor. The floating inductors are based on ordinary dual-output differential difference current conveyor (DO-DDCC) while the grounded lossless inductor is based one a modified dual-output differential difference current conveyor (MDO-DDCC). The proposed lossless floating inductor is obtained from the lossy one by employing a negative impedance converter (NIC). The non-ideality effects of the active element on the simulated inductors are investigated. To demonstrate the performance of the proposed grounded inductance simulator as an example, it is used to construct a parallel resonant circuit. SPICE simulation results are given to confirm the theoretical analysis.

A new
electronically-controllable lossless floating inductance (FI) circuit (without
any matching condition) has been presented, which employs only one Voltage
Differencing Current Conveyor (VDCC), one grounded capacitor and
one grounded resistor. The main aim of the paper is to present a new floating
inductance simulator using single active device with minimum passive
components. The proposed floating inductance simulator can be electronically
controllable by changing the bias current. The workability of the new presented
FI circuit has been verified using SPICE simulation with TSMC CMOS 0.18μm process parameters.

Abstract:
A generalization method is used to transform a floating resistor oscillator circuit to a family of sixteen grounded capacitor oscillators using the current conveyor (CCII) or the inverting current conveyor (ICCII) or combination of both. Two of the oscillator circuits have a floating property. A new family of sixteen oscillator circuits is generated from the known circuit using the adjoint circuit theorem. It is also shown that the oscillator under consideration leads to the generation of other known and new grounded passive element oscillators employing the differential voltage current conveyor (DVCC) and the balanced output current conveyor (BOCCII).

An electronically controllable fully uncoupled explicit current-mode quadrature oscillator employing Voltage Differencing Transconductance Amplifiers (VDTAs) as active elements has been presented. The proposed configuration employs two VDTAs along with grounded capacitors and offers the following advantageous features 1) fully and electronically independent control of condition of oscillation (CO) and frequency of oscillation (FO);2) explicit current-mode quadrature oscillations; and 3) low active and passive sensitivities. The workability of proposed configuration has been demonstrated by PSPICE simulations with TSMC CMOS 0.18μm process parameters.

Abstract:
A configuration using current feedback amplifiers AD844 and multiplier AD534 has been presented, which is capable of realizing Voltage Controlled Floating Inductance (proportional and in-verse proportional). The application of band pass filter in Figure 4(a), notch filter in Figure 5(a) and Hartley oscillator in Figure 6(a) and simulation result in Figures 4(b)-(d), Figures 5(b)-(d), Figures 6(b)-(d) shows the workability of proposed configuration.

Abstract:
Two new configurations for realizing ideal floating frequency-dependent negative resistor elements (FDNR) are introduced. The proposed circuits are symmetrical and are realizable by four CCII or ICCII or a combination of both. Each configuration is realizable by eight different circuits. Simulation results are included to support the theory.