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Arbitrary Shape Representation and Registration Based on Hough Spectrum
基于Hough谱的任意形状表示与配准

WANG Cailing,ZHAO Chunxia,
王彩玲
,赵春霞

中国图象图形学报 , 2010,
Abstract: A novel shape representation and registration method based on Hough spectrum is developed in this paper. The weighted-average Hough spectrum(WAHS) is defined for the representation of arbitrary shapes, and the translation, rotation, scale and periodic properties of WAHS are summarized and proved. When registration, the parameters of rotation and scale can be estimated easily from the phase and amplitude of WAHS, and the parameter of translation can be estimated in the Hough density space. Experiments show that the method is effective to estimate the parameters of translation, rotation and scale, and is immune to noise and overlapping.
Lookup Table Optimization for Sensor Linearization in Small Embedded Systems  [PDF]
Lars E. Bengtsson
Journal of Sensor Technology (JST) , 2012, DOI: 10.4236/jst.2012.24025
Abstract: This paper treats the problem of designing an optimal size for a lookup table used for sensor linearization. In small embedded systems the lookup table must be reduced to a minimum in order to reduce the memory footprint and intermediate table values are estimated by linear interpolation. Since interpolation introduces an estimation uncertainty that increases with the sparseness of the lookup table there is a trade-off between lookup table size and estimation precision. This work will present a theory for finding the minimum allowed size of a lookup table that does not affect the overall precision, i.e. the overall precision is determined by the lookup table entries’ precision, not by the interpolation error.
An Optimal Lookup Table Construction for Charge Division with respect to Efficiency Flatness  [PDF]
Patrick Van Esch,Frederic Millier
Physics , 2006, DOI: 10.1063/1.1623607
Abstract: Static lookup tables as often used in the position calculation electronics in position sensitive detectors suffer from the well known problem that the propagation of digitization errors in the division leads to unequal efficiencies for the different output channels. In this paper we present a solution to the construction of such a lookup table which is optimal in the sense that the least possible efficiency errors are committed in the class of monotone lookup tables. The obtained resolution is comparable to what is obtained using the standard implementation of the fixed point division. After a theoretical explanation, we present some experimental results confirming our claim.
IP address lookup for Internet routers using cache routing table  [PDF]
Houassi Hichem,Bilami Azeddine
International Journal of Computer Science Issues , 2010,
Abstract: So that the routers forward an IP packet with his destination, they are running a forwarding decision on an incoming packet to determine the packet's next-hop router. This is achieved by looking up the longest matching prefix with a packet destination address in the routing tables. Therefore, one major factor in the overall performance of a router is the speed of the IP address lookup operation due to the increase in routing table size, in this paper, a new IP address lookup algorithm based on cache routing-table is proposed, that contains recently used IP addresses and their forwarding information to speed up the IP address lookups operation in the routers. We evaluated the performance of our proposed algorithm in terms of consultation time for several sets of IP addresses, the results of performance evaluation show that our algorithm is efficient in terms of the lookup speed since search can be immediately finished when the input IP address is found in the cache routing table.
Power and Time Efficient IP Lookup Table Design Using Partitioned TCAMs  [PDF]
Youngjung Ahn, Yongsuk Lee, Gyungho Lee
Circuits and Systems (CS) , 2013, DOI: 10.4236/cs.2013.43041
Abstract: This paper proposes a power and time efficient scheme for designing IP lookup tables. The proposed scheme uses partitioned Ternary Content Addressable Memories (TCAMs) that store IP lookup tables. The proposed scheme enables O(1) time penalty for updating an IP lookup table. The partitioned TCAMs allow an update done by a simple insertion without the need for routing table sorting. The organization of the routing table of the proposed scheme is based on a partition with respect to the output port for routing with a smaller priority encoder. The proposed scheme still preserves a similar storage requirement and clock rate to those of existing designs. Furthermore, this scheme reduces power consumption due to using a partitioned routing table.
UnoHop: Efficient Distributed Hash Table with O(1) Lookup Performance  [PDF]
Herry Sitepu,Carmadi Machbub,Armein Z. R. Langi,Suhono H. Supangkat
ITB Journal of Information and Communication Technology , 2008, DOI: 10.5614/itbj.ict.2008.2.1.4
Abstract: Distributed Hash Tables (DHTs) with O(1) lookup performance strive to minimize the maintenance traffic which required for propagating membership changes information (events). These events distribution allows each node in the peer-to-peer network maintains accurate routing tables with complete membership information. We present UnoHop, a novel DHT protocol with O(1) lookup performance. The protocol uses an efficient mechanism to distribute events through a dissemination tree that constructed dynamically rooted at the node that detect the events. Our protocol produces symmetric bandwidth usage at all nodes while decreasing the events propagation delay.
CLTChord: Improving lookup at the Chord protocol using cache location table  [cached]
Jaber Karimpour 1,Majid Moghaddam 2,Ali A. Noroozi 3
International Journal of Soft Computing and Software Engineering , 2012, DOI: 10.7321/jscse.v2.n7.5
Abstract: Peer-to-peer networks have emerged as a common method for sharing large amounts of data. The main challenge in these networks is efficiently locating information distributed across the hosts/peers of the network by decentralized approach. In this paper, first we refer to the Chord protocol that is a distributed lookup service, and then propose a new method, called CLTChord, to optimize this protocol. In this new method, in addition to using the local finger tables for routing requests, the cache location tables are used, in which each node stores nodes which are at its close geographical range. When a node receives a new request, it first checks its cache location table and if a desired response is not received, the algorithm continues to work like the basic Chord protocol. Our simulation shows that this optimization improves the parameters of the hop count, the lookup latencies and number of the sent packets; In this paper, hop count is the distance between the source node which initiates the lookup and the target node which has the desired value; and latency is the duration of time needed for resolving file lookups from the time when it was initiated until it was responded to (measured in milliseconds).
Fault Detection and Fault Diagnosis Techniques for Lookup Table FPGAs  [PDF]
Shyue-Kung Lu,Fu-Min Yeh,Jen-Sheng Shih
VLSI Design , 2002, DOI: 10.1080/1065514021000012011
Abstract: In this paper, we present a novel fault detection and fault diagnosis technique for Field Programmable Gate Arrays (FPGAs). The cell is configured to implement a bijective function to simplify the testing of the whole cell array. The whole chip is partitioned into disjoint one-dimensional arrays of cells. For the lookup table (LUT), a fault may occur at the memory matrix, decoder, input or output lines. The input patterns can be easily generated with a k-bit binary counter, where k denotes the number of input lines of a configurable logic block (CLB). Theoretical proofs show that the resulting fault coverage is 100%. According to the characteristics of the bijective cell function, a novel built-in self-test structure is also proposed. Our BIST approaches have the advantages of requiring less hardware resources for test pattern generation and output response analysis. To locate a faulty CLB, two diagnosis sessions are required. However, the maximum number of configurations is k + 4 for diagnosing a faulty CLB. The diagnosis complexity of our approach is also analyzed. Our results show that the time complexity is independent of the array size of the FPGA. In other words, we can make the FPGA array C-diagnosable.
Analysis on Lookup of CAM Aided Hash Table
CAM辅助的哈希表查找性能分析

Wan Cheng-wei Wu Jiang-xing Li Yu-feng Lan Ju-long,
万成威
,邬江兴,李玉峰,兰巨龙

电子与信息学报 , 2011,
Abstract: Hashing is popularly adopted when it comes to a large scale of IP flows. High throughout is available with minimized average memory access number. This paper mainly focused on the lookup performance of CAM (Content Addressable Memory) Aided Hash Table (CAHT). By rational approximation, the paper provides the lower bound on average memory access number over lookup of CASHT; based on the analysis of CASHT, the paper also proposes the condition when to get the lower bound on average memory access number over lookup of CAMHT; Finally, simulation of actual network data shows its consistency to the theory model, which gives essential theory support to design and evaluate the hashing scheme in the actual applications.
A New Timing-Driven Placement Algorithm Based on Table-Lookup Delay Model
A New Timing- Driven Placement Algorithm Based on Table- Lookup Delay Model

YU Hong,HONG Xian-long,YAO Bo,CAI Yi-ci,
于泓
,洪先龙,姚波,蔡懿慈

半导体学报 , 2000,
Abstract: An algorithm is presented for obtaining placements of cell\|based very large scale integrated circuits, subject to timing constraints based on table\|lookup model. A new timing delay model based on some delay tables of fabricators is first simplified and deduced; then it is formulated as a constrained programming problem using the new timing delay model. The approach combines the well\|known quadratic placement with bottom\|up clustering, as well as the slicing partitioning strategy, which has been tested on a set of sample circuits from industry and the results obtained show that it is very promising.
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