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Verification and Validation Methodology for Safety Critical Embedded Systems  [PDF]
P. Swaminathan
Journal of Artificial Intelligence , 2012,
Abstract: Embedded Systems used for control of the process plants can be classified as safety critical embedded systems. To achieve the specified probability failure on demand, it is essential to customize the relevant IEEE standards. Since the requirement specifications will be well specified for process control applications, it is appropriate to follow the waterfall product development cycle. Enough thoughts are not given for Verification and Validation of embedded systems. Verification and Validation process for safety critical embedded system and the challenges for Verification and Validation team are detailed in this study.
Specification and Verification of Distributed Embedded Systems: A Traffic Intersection Product Family
Peter Csaba ?lveczky,José Meseguer
Electronic Proceedings in Theoretical Computer Science , 2010, DOI: 10.4204/eptcs.36.8
Abstract: Distributed embedded systems (DESs) are no longer the exception; they are the rule in many application areas such as avionics, the automotive industry, traffic systems, sensor networks, and medical devices. Formal DES specification and verification is challenging due to state space explosion and the need to support real-time features. This paper reports on an extensive industry-based case study involving a DES product family for a pedestrian and car 4-way traffic intersection in which autonomous devices communicate by asynchronous message passing without a centralized controller. All the safety requirements and a liveness requirement informally specified in the requirements document have been formally verified using Real-Time Maude and its model checking features.
Equivalence Checking in Embedded Systems Design Verification  [PDF]
S. Bandyopadhyay,D. Sarkar,C. R. Mandal
Computer Science , 2010,
Abstract: In this report we focus on some aspects related to modeling and formal verification of embedded systems. Many models have been proposed to represent embedded systems. These models encompass a broad range of styles, characteristics, and application domains and include the extensions of finite state machines, data flow graphs, communication processes and Petri nets. In this report, we have used a PRES+ model (Petri net based Representation for Embedded Systems) as an extension of classical Petri net model that captures concurrency, timing behaviour of embedded systems; it allows systems to be representative in different levels of abstraction and improves expressiveness by allowing the token to carry information. Modeling using PRES+, as discussed above, may be convenient for specifying the input behaviour because it supports concurrency. However, there is no equivalence checking method reported in the literature for PRES+ models to the best of our knowledge. In contrast, equivalence checking of FSMD models exist. As a first step, therefore, we seek to devise an algorithm to translate PRES+ models to FSMD models.
Modelo de requisitos para sistemas embebidos: Model of requirements for embedded systems
González Palacio,Liliana; Urrego Giraldo,Germán;
Revista Ingenierías Universidad de Medellín , 2008,
Abstract: in this paper a model of requirements for supporting the construction of embedded systems is presented. currently, the methodologies of engineering of requirements, in this field, do not let continuity in their development process, since they have a strong orientation to design stage and a weaker emphasis on the analysis stage. furthermore, such methodologies provide guidelines for treating requirements after being obtained. however, they do not propose tools such as a model of requirements for obtaining them. this paper is the result of a research project which objective is to propose engineering of requirements methodology for embedded systems analysis. the model of proposed requirements and its use are illustrated through an application case consisting on obtaining requirements for a movement sensing system, embedded in a home alarm system.
Verification of Embedded Memory Systems using Efficient Memory Modeling  [PDF]
Malay K. Ganai,Aarti Gupta,Pranav Ashar
Computer Science , 2007,
Abstract: We describe verification techniques for embedded memory systems using efficient memory modeling (EMM), without explicitly modeling each memory bit. We extend our previously proposed approach of EMM in Bounded Model Checking (BMC) for a single read/write port single memory system, to more commonly occurring systems with multiple memories, having multiple read and write ports. More importantly, we augment such EMM to providing correctness proofs, in addition to finding real bugs as before. The novelties of our verification approach are in a) combining EMM with proof-based abstraction that preserves the correctness of a property up to a certain analysis depth of SAT-based BMC, and b) modeling arbitrary initial memory state precisely and thereby, providing inductive proofs using SAT-based BMC for embedded memory systems. Similar to the previous approach, we construct a verification model by eliminating memory arrays, but retaining the memory interface signals with their control logic and adding constraints on those signals at every analysis depth to preserve the data forwarding semantics. The size of these EMM constraints depends quadratically on the number of memory accesses and the number of read and write ports; and linearly on the address and data widths and the number of memories. We show the effectiveness of our approach on several industry designs and software programs.
Equivalence Checking in Embedded Systems Design Verification using PRES+ model  [PDF]
Soumyadip Bandyopadhyay
Computer Science , 2010,
Abstract: In this paper we focus on some aspects related to modeling and formal verification of embedded systems. Many models have been proposed to represent embedded systems. These models encompass a broad range of styles, characteristics, and application domains and include the extensions of finite state machines, data flow graphs, communication processes and Petri nets. In this report, we have used a PRES+ model (Petri net based Representation for Embedded Systems) as an extension of classical Petri net model that captures concurrency, timing behaviour of embedded systems; it allows systems to be representative in different levels of abstraction and improves expressiveness by allowing the token to carry information. Modeling using PRES+, as discussed above, may be convenient for specifying the input behaviour because it supports concurrency. However, there is no equivalence checking method reported in the literature for PRES+ models to the best of our knowledge. In contrast, equivalence checking of FSMD models exist. As a first step, therefore, we seek to devise an algorithm to translate PRES+ models to FSMD models and we seek to hand execute our algorithm on a real life example and we have to translate two versions of PRES+ models to FSMD models. Then using existing equivalence checker we have checked the equivalence between two FSMD models.
Modelo de requisitos para sistemas embebidos: Model of requirements for embedded systems  [cached]
Liliana González Palacio,Germán Urrego Giraldo
Revista Ingenierías Universidad de Medellín , 2008,
Abstract: En este artículo se presenta un modelo de requisitos como apoyo para la construcción de sistemas embebidos. En la actualidad, las metodologías de Ingeniería de Requisitos propuestas para este dominio no establecen continuidad en su proceso de desarrollo, ya que poseen una fuerte orientación a la etapa de dise o y un énfasis más débil en la etapa de análisis. Además, dichas metodologías ofrecen pautas para tratar los requisitos luego de que han sido obtenidos, pero no proponen herramientas; como por ejemplo, un modelo de requisitos, para la obtención de estos. Este trabajo hace parte de un proyecto de investigación que tiene como objetivo proponer una metodología de Ingeniería de Requisitos (IR) para el análisis de Sistemas Embebidos (SE). El modelo de requisitos propuesto y su forma de utilización se ilustran mediante un caso de aplicación consistente en la obtención de requisitos para un sistema de sensado de movimiento, embebido en un sistema de alarma para hogar. In this paper a model of requirements for supporting the construction of embedded systems is presented. Currently, the methodologies of Engineering of Requirements, in this field, do not let continuity in their development process, since they have a strong orientation to design stage and a weaker emphasis on the analysis stage. Furthermore, such methodologies provide guidelines for treating requirements after being obtained. However, they do not propose tools such as a model of requirements for obtaining them. This paper is the result of a research project which objective is to propose engineering of requirements methodology for embedded systems analysis. The model of proposed requirements and its use are illustrated through an application case consisting on obtaining requirements for a movement sensing system, embedded in a home alarm system.
An Effective Verification and Validation Strategy for Safety-Critical Embedded Systems  [PDF]
Manju Nanda,Jayanthi J,Shrisha Rao
International Journal of Software Engineering & Applications , 2013,
Abstract: This paper presents the best practices to carry out the verification and validation (V&V) for a safety-critical embedded system, part of a larger system-of-systems. The paper talks about the effectiveness of thisstrategy from performance and time schedule requirement of a project. The best practices employed fortheV &Vis a modification of the conventional V&V approach. The proposed approach is iterative whichintroduces new testing methodologies apart from the conventional testing methodologies, an effective wayof implementing the phases of the V&V and also analyzing the V&V results. The new testing methodologiesinclude the random and non-real time testing apart from the static and dynamic tests. The process phasesare logically carried out in parallel and credit of the results of the different phases are takento ensure thatthe embedded system that goes for thefield testing is bug free. The paper also demonstrates the iterativequalities of the process where the iterations successivelyfind faults in the embedded system and executingthe process within a stipulated time frame, thus maintaining the required reliability of the system. Thisapproach is implemented in the most critical applications—-aerospace application where safety of thesystem cannot be compromised. The approach used afixed number of iterationswhich is set to4in thisapplication, with each iteration adding to the reliability and safety of the embedded system. Data collectedand results observed are compared with a conventional approach for the same application and it isdemonstrated that the strategy proposed reduces the time taken by 50% as compared to a conventionalprocess that attains the same reliability as required in the stipulated time
Meta-Model and UML Profile for Requirements Management of Software and Embedded Systems  [cached]
Arpinen Tero,H?m?l?inen TimoD,H?nnik?inen Marko
EURASIP Journal on Embedded Systems , 2011,
Abstract: Software and embedded system companies today encounter problems related to requirements management tool integration, incorrect tool usage, and lack of traceability. This is due to utilized tools with no clear meta-model and semantics to communicate requirements between different stakeholders. This paper presents a comprehensive meta-model for requirements management. The focus is on software and embedded system domains. The goal is to define generic requirements management domain concepts and abstract interfaces between requirements management and system development. This leads to a portable requirements management meta-model which can be adapted with various system modeling languages. The created meta-model is prototyped by translating it into a UML profile. The profile is imported into a UML tool which is used for rapid evaluation of meta-model concepts in practice. The developed profile is associated with a proof of concept report generator tool that automatically produces up-to-date documentation from the models in form of web pages. The profile is adopted to create an example model of embedded system requirement specification which is built with the profile.
Parameterized Verification of Graph Transformation Systems with Whole Neighbourhood Operations  [PDF]
Giorgio Delzanno,Jan Stückrath
Computer Science , 2014,
Abstract: We introduce a new class of graph transformation systems in which rewrite rules can be guarded by universally quantified conditions on the neighbourhood of nodes. These conditions are defined via special graph patterns which may be transformed by the rule as well. For the new class for graph rewrite rules, we provide a symbolic procedure working on minimal representations of upward closed sets of configurations. We prove correctness and effectiveness of the procedure by a categorical presentation of rewrite rules as well as the involved order, and using results for well-structured transition systems. We apply the resulting procedure to the analysis of the Distributed Dining Philosophers protocol on an arbitrary network structure.
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