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电子学报  2015 

基于低硬件复杂度、高速CORDIC的SVD模块设计与实现

DOI: 10.3969/j.issn.0372-2112.2015.04.016, PP. 738-742

Keywords: 奇异值分解(SVD),坐标旋转数字计算机(CORDIC),向量旋转

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Abstract:

为降低实现高阶矩阵SVD时的硬件复杂度和计算延时,本文改进了CORDIC迭代结构,设计了一种用于SVD的低硬件复杂度、高速CORDIC计算单元.本文以2×2矩阵为例,基于XilinxVirtex6硬件平台设计并实现了使用优化后CORDIC计算单元的SVD模块,在19bit位宽下吞吐率达25.9Gbps.对比XilinxIPcore中同类模块,本文设计节省27.6%寄存器,27.7%查找表,实时性提高14%.对高阶矩阵,本文给出资源消耗趋势曲线,可证明优化后CORDIC计算单元能降低16阶矩阵SVD模块约40%的硬件复杂度.

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