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软件学报  1997 

EXTRACTION AND SYNTHESIS OF CONTROL INFORMATION IN HIGH LEVEL SYNTHESIS
高级综合中控制信息的提取与综合

Keywords: FSMD,scheduling,allocation,finite state machine,sequential logic synthesis
FSMD
,调度,分配,有限状态自动机,时序逻辑综合

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Abstract:

The authors discuss concisely, the process of high level synthesis and the extraction and transformation of control information generated in the said process. The authors also discuss the methodology of linking the result of data flow synthesis and that of control flow synthesis as well as the mapping to technology-dependent ASIC based on Xilinx FPGAs.

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