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Simultaneous Hashing of Multiple Messages

DOI: 10.4236/jis.2012.34039, PP. 319-325

Keywords: SHA-256, SHA-512, SHA3 Competition, SIMD Architecture, Advanced Vector Extensions Architectures, AVX, AVX2

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Abstract:

We describe a method for efficiently hashing multiple messages of different lengths. Such computations occur in various scenarios, and one of them is when an operating system checks the integrity of its components during boot time. These tasks can gain performance by parallelizing the computations and using SIMD architectures. For such scenarios, we compare the performance of a new 4-buffers SHA-256 S-HASH implementation, to that of the standard serial hashing. Our results are measured on the 2nd Generation Intel? CoreTM Processor, and demonstrate SHA-256 processing at effectively ~5.2 Cycles per Byte, when hashing from any of the three cache levels, or from the system memory. This represents speedup by a factor of 3.42x compared to OpenSSL (1.0.1), and by 2.25x compared to the recent and faster n-SMS method. For hashing from a disk, we show an effective rate of ~6.73 Cycles/Byte, which is almost 3 times faster than OpenSSL (1.0.1) under the same conditions. These results indicate that for some usage models, SHA-256 is significantly faster than commonly perceived.

References

[1]  NIST, “Cryptographic Hash Algorithm Competition,” http://csrc.nist.gov/groups/ST/hash/sha-3/index.html
[2]  S. Gueron and V. Krasnov, “Parallelizing Message Schedules to Accelerate the Computations of Hash Functions,” 2012. http://eprint.iacr.org/2012/067.pdf
[3]  S. Gueron and V. Krasnov, “[PATCH] Efficient Implementations of SHA256 and SHA512, Using the Simultaneous Message Scheduling method,” 2012. http://rt.openssl.org/Ticket/Display.html?id=2784&user=guest&pass=guest
[4]  The Chromium Project, “Verified Boot,” http://www.chromium.org/chromium-os/chromiumos-design-docs/verified-boot
[5]  C. Y. Liu, Y. P. Lu, C. H. Shi, G. L. Lu, D. H. C. Du and D.-S. Wang, “ADMAD: Application-Driven Metadata Aware De-duplication Archival Storage System,” Fifth IEEE International Workshop on Storage Network Architecture and Parallel I/Os, 22 September 2008, pp. 29-35.
[6]  O. Aciicmez, “Fast Hashing on Pentium SIMD Architecture,” M.S. Thesis, School of Electrical Engineering and Computer Science, Oregon State University, 2004.
[7]  D. Gaudet, “SHA1 Using SIMD Techniques,” http://arctic.org/~dean/crypto/sha1.html
[8]  M. Locktyukhin, “Improving the Performance of the Secure Hash Algorithm (SHA-1),” 2010. http://software.intel.com/en-us/articles/improving-the-performance-of-the-secure-hash-algorithm-1/
[9]  “Federal Information Processing Standards Publication 180-2: Secure Hash Standard,” http://csrc.nist.gov/publications/fips/fips180-2/fips180-2.pdf
[10]  Intel, “Intel Advanced Vector Extensions Programming Reference,” http://software.intel.com/file/36945
[11]  Intel (M. Buxton), “Haswell New Instruction Descriptions Now Available,” 2011. http://software.intel.com/en-us/blogs/2011/06/13/haswell-new-instruction-descriptions-now-available/
[12]  Linux Manual, “Hdparm,” http://linux.die.net/man/8/hdparm
[13]  Intel, “2nd Generation Intel? CoreTM Processor Family Desktop Datasheet,” http://www.intel.com/content/www/us/en/processors/core/2nd-gen-core-desktop-vol-1-datasheet.html
[14]  OpenSSL, “The Open Source Toolkit for SSL/TLS,” http://openssl.org/
[15]  LinuxMM, “Drop Caches,” http://linux-mm.org/Drop_Caches

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